Datasheet

Register 37: SHA System Configuration (SHA_SYSCONFIG), offset 0x110
System configuration register
Note: After one operation has completed, the SHA_SYSCONFIG register must be cleared and
re-configured for the next operation to ensure proper µDMA and data operation functionality.
SHA System Configuration (SHA_SYSCONFIG)
Base 0x4403.4000
Offset 0x110
Type RW, reset 0x0000.0001
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
reserved
SOFTRESET
IT_ENDMA_ENSIDLEreserved
SADVANCED
reserved
RORWRWRWRWRWRORWROROROROROROROROType
1000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:8
Advanced Mode Enable
DescriptionValue
Legacy mode enabled for the Secure World. In Legacy mode,
the Secure World, the context input DMA request, and the result
output DMA request are masked. This means that neither
DMAREQUEST_CTXIN_S and DMAREQUEST_CTXOUT_S
are asserted.
0
Advanced mode is enabled. These DMA requests are enabled
by bit 3 of this register.
1
0RWSADVANCED7
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved6
Sidle mode
DescriptionValue
Force-idle mode0x0
reserved0x1-0x3
0RWSIDLE5:4
1069June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C129ENCPDT Microcontroller