Datasheet

Table 15-6. SHA Digest Processed in One Pass (continued)
SHA_DATA_n_INSHA_MODE and
SHA_LENGTH
SHA_DIGEST_COUNTDigest (A to E)
Second 64 bytes of
message
Round 1 digest
calculation
Last byte of messageRound 2 digest
calculation
Read: 129Final digest
15.1.5.2 MD5 Mode
Starting a New Hash
To start a new hash, perform the following steps:
1. Set the ALGO bit field in the SHA_MODE register to 0x0 to select the MD5 algorithm.
2. Set the ALGO_CONSTANT bit to 1 in the SHA_MODE register to initialize all digest registers from
SHA_ODIGEST_A/SHA_IDIGEST_A to SHA_ODIGEST_H/SHA_IDIGEST_H with default
values specified by the algorithm, and set the SHA_DIGESTCOUNT register to 0.
3. Specify the LENGTH field in the SHA_LENGTH register of the hash data to process in bytes.
4. Set the CLOSE_HASH bit in the SHA_MODE register to let the SHA/MD5 engine do the padding.
If MD5 is computed in one shot, the length of the message can be any value up to . To process
an intermediate MD5 digest, the CLOSE_HASH bit is set to 0, in which case packets to be hashed
must be 64 bytes; the last packet must be hashed with the CLOSE_HASH bit set to 1.
After the configuration is complete, the hash engine can receive the data to process (the
INPUT_READY bit is 1 in the SHA_IRQSTATUS register). Data must be written to the 16 x 32-bit
SHA_DATA_n_IN registers that provide storage for one 64-byte block of data. Unless the
CLOSE_HASH bit is set in the SHA_MODE register, the SHA_DATA_n_IN 64-byte input buffer must
be filled. Data can be written by single write transactions to the 16 registers from a processor or by
a µDMA transfer.
For a µDMA transfer, the SDAM_EN bit must be set in the SHA_SYSCONFIG register before starting
the new hash and the µDMA channel for SHA/MD5 0 Data In Request must be configured. The
µDMA must be configured to the appropriate hash transfer size. See “Micro Direct Memory Access
(μDMA)” on page 686 for more information on programming the µDMA. A µDMA done is asserted
after the last SHA_DATA_n_IN register is filled..
The module detects that a 64-byte block is available, and then moves the data to a working register
space for processing and sets the INPUT_READY bit to 1 in the SHA_IRQSTATUS register. If the
DMA_EN bit is set in the SHA_SYSCONFIG register, then a new µDMA request triggers a new block
transfer; otherwise, the processor polls the INPUT_READY bit in the SHA_IRQSTATUS register and
writes the 16 data words of 32 bits when it equals 1.
This operation repeats until the length of the message to hash is reached. The OUTPUT_READY bit
in the SHA_IRQSTATUS register then indicates that the hash operation is complete. If the IT_EN
bit in the SHA_SYSCONFIG register is set, an interrupt (active low) is also generated to indicate
the hash completion.
June 18, 20141052
Texas Instruments-Production Data
SHA/MD5 Accelerator