Datasheet
15 SHA/MD5 Accelerator
The SHA/MD5 module provides hardware-accelerated hash functions and can run:
■ MD5 message digest algorithm developed by Ron Rivest in 1991
■ SHA-1 algorithm compliant with the FIPS 180-3 standard
■ SHA-2 (SHA-224 and SHA-256) algorithm compliant with the FIPS 180-3 standard
■ Hash message authentication code (HMAC) operation
The algorithms produce a condensed representation of a message or a data file, called digest or
signature, which can then be used to verify the message integrity.
■ Hashing of 0 to 2
33
- 2 bytes of data (of which 2
32
- 1 bytes are in one pass) using the MD5,
SHA-1, SHA-224, or SHA-256 hash algorithm (byte granularity only, no support for bit granularity)
■ Automatic HMAC key preprocessing for HMAC keys up to 64 bytes
■ Host-assisted HMAC key preprocessing for HMAC keys larger than 64 bytes
■ HMAC from precomputes (inner/outer digest) for improved performance on small blocks
■ Supports µDMA operation for data and context in/result out transfers
■ Supports interrupt to read the digest (signature)
15.1 SHA/MD5 Functional Description
15.1.1 SHA/MD5 Block Diagram
Figure 15-1 on page 1045 shows the module architecture, which consists of four primary blocks: the
Hash/HMAC engine, the configuration registers and the interface to µDMA and the interrupt handler.
June 18, 20141044
Texas Instruments-Production Data
SHA/MD5 Accelerator