Datasheet

Register 19: DES DMA Interrupt Mask (DES_DMAIM), offset 0x030
The DES DMA Interrupt Mask register control interrupt behavior and are used to program which
interrupts are suppressed.
DES DMA Interrupt Mask (DES_DMAIM)
Base 0x4403.0000
Offset 0x030
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
CINDINDOUTreserved
RWRWRWROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:3
Data Out DMA Done Interrupt Mask
If this bit is unmasked, an interrupt is generated when the µDMA writes
the last word of the process result.
DescriptionValue
The DOUT interrupt is suppressed and not sent to the interrupt
controller.
0
The DOUT interrupt is sent to the interrupt controller.1
0RWDOUT2
Data In DMA Done Interrupt Mask
If this bit is unmasked, an interrupt is generated when the µDMA writes
the last word of input data to the internal FIFO of the engine.
DescriptionValue
The DIN interrupt is suppressed and not sent to the interrupt
controller.
0
The DIN interrupt is sent to the interrupt controller.1
0RWDIN1
Context In DMA Done Interrupt Mask
If this bit is unmasked, an interrupt is generated when the µDMA
completes a context write to the internal register.
DescriptionValue
The CIN interrupt is suppressed and not sent to the interrupt
controller.
0
The CIN interrupt is sent to the interrupt controller.1
0RWCIN0
June 18, 20141040
Texas Instruments-Production Data
Data Encryption Standard Accelerator (DES)