Datasheet

Register 38: AES Dirty Bits (AES_DIRTYBITS), offset 0x094
This register can be used to identify if AES registers have been read or written to.
AES Dirty Bits (AES_DIRTYBITS)
Base 0x4403.6000
Offset 0x094
Type RW1C, reset 0x0000.0000
16171819202122232425262728293031
reserved
RRRRRRRRRRRRRRRRType
0000000000000000Reset
0123456789101112131415
S_ACCESS
S_DIRTYreserved
RW1CRW1CRRRRRRRRRRRRRRType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0Rreserved31:2
AES Dirty Bit
This bit must be written to a 1 to clear.
DescriptionValue
No AES registers have been written.0
Indicates when any of the AES_x registers have been written
(except for the AES_DIRTYBITS register).
1
0RW1CS_DIRTY1
AES Access Bit
This bit must be written to a 1 to clear.
DescriptionValue
No AES registers have been read.0
Indicates when any of the AES_x registers have been read
(except for the AES_DIRTYBITS register).
1
0RW1CS_ACCESS0
13.7 AES µDMA Interrupt Register Descriptions (CCM Offset)
This section lists and describes the AES µDMA registers, in numerical order by address offset.
Registers in this section are relative to the base address of 0x4403.0000.
June 18, 20141008
Texas Instruments-Production Data
Advance Encryption Standard Accelerator (AES)