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BoosterPack XL Functional Interface
3 BoosterPack XL Functional Interface
The BoosterPack XL Interface consists of the J1 and J2 connectors as well as the inner 10-pin headers
spaced 1.6 in (4,064 cm) apart directly inside of the MSP430 LaunchPad-compatible BoosterPack
interface headers. The pins are spaced on 0.10-inch (2,54-mm) centers. These inner 10-pin headers
(connectors J3 and J4) are not intended to be compatible with other TI LaunchPads or LaunchPad XL kits.
This feature is a Tiva C Series-only interface. TI recommends that LaunchPads provide analog functions
on the left side of the BoosterPack XL interface and timer or PWM functions on the right side of the
BoosterPack XL interface. The Tiva C Series board conforms to these recommendations. No effort has
been made to make this interface compatible with any other LaunchPad.
Table 4 and Table 5 show the Tiva C Series peripherals that are routed to each pin of the Tiva C Series-
only BoosterPack XL Interface pins. J3 is the inner left BoosterPack XL Interface header. J4 is the inner
right BoosterPack XL Interface header. Software is used to configure the TM4C123GH6PM pin for one of
the functions found in the tables.
Table 4. J3 Connector
(1)
Analog
Tiva C
GPIOPCTL Register Setting
Function
J3 On-board Series
GPIO
Pin Function MCU
GPIO
1 2 3 4 5 6 7 8 9 14 15
Pin
AMSEL
3.01 5.0 V
3.02 GND
PD0 AIN7 Connected 61 SSI3Clk SSI1Clk I2C3SCL M0PWM6 M1PWM0 WT2CCP0
for MSP430
3.03
PB6 1 SSI2Rx M0PWM0 T0CCP0
Compatibilit
y (R9)
PD1 AIN6 Connected 92 SSI3Fss SSI1Fss I2C3SDA M0PWM7 M1PWM1 WT2CCP1
for MSP430
3.04
PB7 4 SSI2Tx M0PWM1 T0CCP1
Compatibilit
y (R10)
3.05 PD2 AIN5 63 SSI3Rx SSI1Rx M0FAULT0 WT3CCP0 USB0EPE
N
3.06 PD3 AIN4 64 SSI3Tx SSI1Tx WT3CCP1 USB0PFLT
3.07 PE1 AIN2 8 U7Tx
3.08 PE2 AIN1 7
3.09 PE3 AIN0 6
3.10 PF1 29 U1CTS SSI1Tx M1PWM5 T0CCP1 C1o TRD1
(2)
(1)
Shaded cells indicate configuration for compatibility with the MSP430 LaunchPad.
(2)
Not recommended for BoosterPack use. This signal tied to on-board function via 0-Ω resistor.
Table 5. J4 Connector
Analog
Tiva C
GPIOPCTL Register Setting
On-
Function
J4 Series
GPIO board
Pin MCU
GPIO
Function
1 2 3 4 5 6 7 8 9 14 15
Pin
AMSEL
4.01 PF2 Blue LED 30 SSI1Clk M0FAULT0 M1PWM6 T1CCP0 TRD0
(R11)
4.02 PF3 Green 31 SSI1Fss CAN0Tx M1PWM7 T1CCP1 TRCLK
LED
(R12)
4.03 PB3 48 I2C0SDA T3CCP1
4.04 PC4 C1– 16 U4Rx U1Rx M0PWM6 IDX1 WT0CCP0 U1RTS
4.05 PC5 C1+ 15 U4Tx U1Tx M0PWM7 PhA1 WT0CCP1 U1CTS
4.06 PC6 C0+ 14 U3Rx PhB1 WT1CCP0 USB0EPE
N
4.07 PC7 C0– 13 U3Tx WT1CCP1 USB0PFLT
4.08 PD6 53 U2Rx PhA0 WT5CCP0
4.09 PD7 10 U2Tx PhB0 WT5CCP1 NMI
4.10
(1)
PF4 USR_SW 5 M1FAULT0 IDX0 T2CCP0 USB0EPE
1 (R13) N
(1)
Not recommended for BoosterPack use. This signal tied to on-board function via 0-Ω resistor.
5
SPMU288AAugust 2012Revised April 2013 Tiva™ C Series EK-TM4C123GXL LaunchPad: BoosterPack Development
Guide
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