Datasheet

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SLES116A − AUGUST 2004 − REVISED NOVEMBER 2006
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20
9
SDA
SCL St
Start
1−7 8 1−8 9 1−8 9 9 Sp
Stop
Slave Address ACK DATA ACK DATA ACK ACK
ConditionCondition
R/W
R/W: Read Operation if 1; Otherwise, Write Operation
ACK: Acknowledgement of a Byte if 0
DATA: 8 Bits (Byte)
Write operation
Transmitter M M M S M S M S S M
Data Type St Slave Address R/W ACK DATA ACK DATA ACK ACK Sp
Read operation
Transmitter M M M S S M S M M M
Data Type St Slave Address R/W ACK DATA ACK DATA ACK NACK Sp
M: Master Device S: Slave Device
St: Start Condition Sp: Stop Condition
Figure 29. Basic I
2
C Framework
Write Register
A master can write to any DSD1794A registers using single or multiple accesses. The master sends a DSD1794A
slave address with a write bit, a register address, and the data. If multiple access is required, the address is that of
the starting register, followed by the data to be transferred. When the data are received properly, the index register
is incremented by 1 automatically. When the index register reaches 0x7F, the next value is 0x0. When undefined
registers are accessed, the DSD1794A does not send an acknowledgement. Figure 30 is a diagram of the write
operation.
Transmitter
M M M S M S M S M S S M
Data Type St Slave Address W ACK Reg Address ACK Write Data 1 ACK Write Data 2 ACK ACK Sp
M: Master Device S: Slave Device
St: Start Condition W: Write ACK: Acknowledge Sp: Stop Condition
Figure 30. Write Operation
Read Register
A master can read the DSD1794A register. The value of the register address is stored in an indirect index register
in advance. The master sends a DSD1794A slave address with a read bit after storing the register address. Then
the DSD1794A transfers the data which the index register points to. When the data are transferred during a multiple
access, the index register is incremented by 1 automatically. (When first going into read mode immediately following
a write, the index register is not incremented. The master can read the register that was previously written.) When
the index register reaches 0x7F, the next value is 0x0. The DSD1794A outputs some data when the index register
is 0x10 to 0x1F, even if it is not defined in Table 3. Figure 31 is a diagram of the read operation.