Datasheet

DS99R105, DS99R106
www.ti.com SNLS242D –MARCH 2007–REVISED APRIL 2013
Electrical Characteristics
(1)(2)(3)
(continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Parameter Test Conditions Pin/Freq. Min Typ Max Units
SER/DES SUPPLY CURRENT (DVDD*, PVDD* and AVDD* pins) *Digital, PLL, and Analog VDDs
I
DDT
Serializer (Tx) R
L
= 100Ω f = 40 MHz
Total Supply Current Pre-emphasis = OFF
40 80 mA
(includes load current) VODSEL = L
Checker-board pattern (Figure 2)
R
L
= 100Ω f = 40 MHz
Pre-emphasis = ON
45 85 mA
VODSEL = L
Checker-board pattern (Figure 2)
Serializer (Tx) R
L
= 100Ω f = 40 MHz
Total Supply Current Pre-emphasis = OFF
40 85 mA
(includes load current) VODSEL = H
Checker-board pattern (Figure 2)
R
L
= 100Ω f = 40 MHz
Pre-emphasis = ON
45 90 mA
VODSEL = H
Checker-board pattern (Figure 2)
I
DDTZ
Serializer (Tx) TPWDNB = 0V
1 100 µA
Supply Current Power-down (All other LVCMOS Inputs = 0V)
I
DDR
Deserializer (Rx) C
L
= 8 pF LVCMOS Output f = 40 MHz
Total Supply Current Checker-board pattern 95 mA
(includes load current) (Figure 3)
Deserializer (Rx) C
L
= 8 pF LVCMOS Output f = 40 MHz
Total Supply Current Random pattern 90 mA
(includes load current)
I
DDRZ
Deserializer (Rx) RPWDNB = 0V
Supply Current Power-down (All other LVCMOS Inputs = 0V, 1 50 µA
R
IN+
/ R
IN-
= 0V)
Serializer Timing Requirements for TCLK
(1)(2)
Over recommended operating supply and temperature ranges unless otherwise specified.
Parameter Test Conditions Min Typ Max Units
t
TCP
Transmit Clock Period (Figure 6) 25 T 333 ns
t
TCIH
Transmit Clock High Time 0.4T 0.5T 0.6T ns
t
TCIL
Transmit Clock Low Time 0.4T 0.5T 0.6T ns
t
CLKT
TCLK Input Transition Time (Figure 5) 3 6 ns
t
JIT
TCLK Input Jitter
(3)
33 ps (RMS)
(1) Figure 2, Figure 3, Figure 9, Figure 13, and Figure 15 show a falling edge data strobe (TCLK IN/RCLK OUT).
(2) Figure 6 and Figure 16 show a rising edge data strobe (TCLK IN/RCLK OUT).
(3) t
JIT
(@BER of 10e-9) specifies the allowable jitter on TCLK. t
JIT
not included in TxOUT_E_O parameter.
Serializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Parameter Test Conditions Min Typ Max Units
t
LLHT
LVDS Low-to-High Transition Time R
L
= 100Ω, (Figure 4) 0.6 ns
C
L
= 10 pF to GND
t
LHLT
LVDS High-to-Low Transition Time
0.6 ns
VODSEL = L
t
DIS
DIN (23:0) Setup to TCLK R
L
= 100Ω, 5 ns
C
L
= 10 pF to GND
t
DIH
DIN (23:0) Hold from TCLK
5 ns
(1)
(1) Specification is ensured by characterization and is not tested in production.
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