Datasheet

DIN0
DIN1
DIN2
DIN3
DIN4
DIN5
DIN6
DIN7
DIN8
DIN9
DIN10
DIN11
DIN12
DIN13
DIN14
DIN15
DIN16
DIN17
DIN18
DIN19
DIN20
DIN21
DIN22
DIN23
TCLK
DOUT+
DOUT-
VDDT
VSSDR
VDDL
VSSPT0
VSSPT1
VSST
VSSL
VSSIT
VDDPT1
VDDPT0
VDDIT
VDDDR
Notes:
TPWDNB = System GPO
DEN = High (ON)
TRFB = High (Rising edge)
VODSEL = Low (400mV)
PRE = Low (OFF)
RESRVD = Low
DCAOFF = Low
DCBOFF = Low
DS99R105 (SER)
C1 C4
C2 C5
C3 C6
C7
C8
R1
C1 to C3 = 0.01 PF
C4 to C6 = 0.1 PF
C7, C8 = 100 nF; 50WVDC, NPO or X7R
R1 = 100:
LVCMOS
Parallel
Interface
Serial
LVDS
Interface
VSS
3.3V
TPWDNB
DEN
TRFB
DCAOFF
VODSEL
PRE
DCBOFF
3.3V
GPOs if used, or tie High (ON)
RESRVD
100:
100 nF
100 nF
100:
100 nF
100 nF
DOUT-
DOUT+
RIN-
RIN+
DS99R105, DS99R106
SNLS242D –MARCH 2007–REVISED APRIL 2013 www.ti.com
• Minimize skew within the pair
• Terminate as close to the TX outputs and RX inputs as possible
Additional general guidance can be found in the LVDS Owner’s Manual - available in PDF format from the TI
web site at: http://www.ti.com/ww/en/analog/interface/lvds.shtml
Figure 20. AC Coupled Application
Figure 21. DS99R105 Typical Application Connection
20 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: DS99R105 DS99R106