Datasheet
2.0V
0.8V
TCLK
DOUT±
t
HZD
or
t
LZD
t
ZHD
or
t
ZLD
Output
Active
t
PLD
PWDWN
TRI-STATE TRI-STATE
DEN
DOUT-
DOUT+
5 pF
100:
Parasitic package and
Trace capcitance
200 mV
DCA
DCA
DCA
DCA
$OOGDWD³0´V
CLK1
t
ZLD
t
TCP
DCADCADCADCA
CLK1
t
TCP
200 mV
DEN
(single-ended)
200 mV
DCA
DCA
DCA
DCA
$OOGDWD³1´V
CLK0
t
ZHD
t
TCP
DCADCA
DCA
DCA
CLK0
t
TCP
200 mV
DOUT±
(differential)
V
CC
/2
0V
DOUT±
(differential)
0V
V
CC
/2
t
HZD
DEN
(single-ended)
V
CC
/2
0V 0V
V
CC
/2
t
LZD
DS99R103, DS99R104
SNLS241D –MARCH 2007–REVISED APRIL 2013
www.ti.com
Figure 6. Serializer TRI-STATE Test Circuit and Delay
Figure 7. Serializer PLL Lock Time, and TPWDNB TRI-STATE Delays
8 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: DS99R103 DS99R104