Datasheet
48DIN[19]
47DIN[18]
46DIN[17]
45DIN[16]
44DIN[15]
43
V
SS
IT
42
V
DD
IT
41DIN[14]
40DIN[13]
39DIN[12]
38DIN[11]
37DIN[10]
13
14
15
16
17
18
19
20
21
22
23
24
RESRVD
V
DD
PT1
V
SS
PT1
V
DD
PT0
V
SS
PT0
DEN
DOUT-
DOUT+
V
SS
DR
V
DD
DR
PRE
V
SS
12
VODSEL
11
TRFB
10
TCLK
9
TPWDNB
8
DCBOFF
7
V
DD
L
6
V
SS
L
5
DCAOFF
4
DIN[23]
3
DIN[22]
2
DIN[21]
1
DIN[20]
25
26
27
28
29
30
31
32
33
34
35
36
DIN[0]
DIN[1]
DIN[2]
DIN[3]
DIN[4]
V
DD
T
V
SS
T
DIN[5]
DIN[6]
DIN[7]
DIN[8]
DIN[9]
DS99R103
48 PIN WQFN
48 PIN TQFP
DS99R103, DS99R104
SNLS241D –MARCH 2007–REVISED APRIL 2013
www.ti.com
DS99R103 Pin Diagram
Top View
Figure 17. Serializer - DS99R103
See Package Numbers NJU0048D (WQFN) and PFB0048A (TQFP)
DS99R103 Serializer Pin Descriptions
Pin
Pin Name I/O Description
No.
LVCMOS PARALLEL INTERFACE PINS
4-1, DIN[23:0] LVCMOS_I Transmitter Parallel Interface Data Inputs Pins. Tie LOW if unused, do not float.
48-44,
41-32,
29-25
10 TCLK LVCMOS_I Transmitter Parallel Interface Clock Input Pin. Strobe edge set by TRFB configuration pin
CONTROL AND CONFIGURATION PINS
9 TPWDNB LVCMOS_I Transmitter Power Down Bar
TPWDNB = H; Transmitter is Enabled and ON
TPWDNB = L; Transmitter is in power down mode (Sleep), LVDS Driver DOUT (+/-) Outputs are
in TRI-STATE stand-by mode, PLL is shutdown to minimize power consumption.
18 DEN LVCMOS_I Transmitter Data Enable
DEN = H; LVDS Driver Outputs are Enabled (ON).
DEN = L; LVDS Driver Outputs are Disabled (OFF), Transmitter LVDS Driver DOUT (+/-) Outputs
are in TRI-STATE, PLL still operational and locked to TCLK.
23 PRE LVCMOS_I PRE-emphasis select pin.
PRE = (R
PRE
≥ 3 kΩ); I
max
= [(1.2/R)*20], R
min
= 3 kΩ
PRE = No Connect (NC); pre-emphasis is disabled
11 TRFB LVCMOS_I Transmitter Clock Edge Select Pin
TRFB = H; Parallel Interface Data is strobed on the Rising Clock Edge.
TRFB = L; Parallel Interface Data is strobed on the Falling Clock Edge
12 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: DS99R103 DS99R104