Datasheet

DS92LX2122
Deserializer
Graphics
Controller
---
Video
Processor
--
Camera
DS92LX2121
Serializer
PLL
Config.
I
2
C
PC
Config.
I
2
C
R[5:0]
G[5:0]
B[5:0]
VS
HS
DE
Timing
Controller
--
Display
--
Frame Grabber
R[5:0]
G[5:0]
B[5:0]
VS
HS
DE
PCLK
PC
SDA
SCL
SDA
SCL
PCLK
Channel Link III
PDB
M/S
GPO[3:0]
PDB
M/S
BISTEN
GPI[3:0]
Data [17:0],
Control [2:0]
21
DS92LX2121 - SERIALIZER
Clock
Gen
Timing
and
Control
DOUT-
RIN-
DS92LX2122 - DESERIALIZER
DOUT+
RIN+
Timing
and
Control
Input Latch
FIFO
Decoder
21
Data [17:0],
Control [2:0]
Encoder
Serializer
PLL
I2C Controller
Encoder
FIFO
Encoder
I2C Controller
Decoder
Deserializer
Decoder
Output Latch
Clock
Gen
CDR
R
T
R
T
R
T
R
T
LOCK
PCLK
SDA
SCL
GPI[3:0]
4
CAD
PASS
PCLK
SDA
SCL
GPO[3:0]
4
PDB
M/S
CAD
PDB
BISTEN
M/S
Display
Module, Frame
Grabber
Deserializer
DS92LX2121
Serializer
Channel Link III
Back Channel
DS92LX2122
Serial
Control Bus
Serial
Control Bus
Parallel
Data In
Parallel
Data Out
18+3
2
2
Graphics
Controller,
Camera
18+3
GPO
GPI
4
4
DS92LX2121, DS92LX2122
SNLS330I –MAY 2010–REVISED APRIL 2013 www.ti.com
Typical Application Diagram
Block Diagrams
Figure 1. Block Diagram
Figure 2. Application Block Diagram
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