Datasheet

DS92LX1621, DS92LX1622
www.ti.com SNLS327I –MAY 2010–REVISED JANUARY 2014
Table 2. DS92LX1622 Control Registers (continued)
Addr
Name Bits Field R/W Default Description
(Hex)
Back Channel CRC Enable
0: Disable
Tx CRC CHECK
7 RW 1 1: Enable
ENABLE
For proper CRC operation, on Serailizer 0x03h b[6]
CRC Fault
control register must be Enabled.
Tolerant
Transmission
Foward Channel CRC Enable
Rx CRC GEN 0: Disable
6 RW 1
ENABLE 1: Enable For proper CRC operation, on Serailizer 0x03h
b[7] control register must be Enabled.
Auto voltage control
VDDIO Control 5 VDDIO CONTROL RW 1 0: Disable
1: Enable (auto detect mode)
VDDIO voltage set
Only used when VDDIOCONTROL = 0
3
VDDIO Mode 4 VDDIO MODE RW 0
0: 1.8V
1: 3.3V
I
2
C Pass-Through Mode
I
2
C PASS-
I
2
C Pass-Through 3 RW 1 0: Disabled
THROUGH
1: Enabled
0: Disable
Auto ACK 2 AUTO ACK RW 0
1: Enable
CRC Reset 1 CRC RESET RW 0 1: CRC reset
Pixel Clock Edge Select
0: Parallel Interface Data is strobed on the Falling Clock
RRFB 0 RRFB RW 1 Edge
1: Parallel Interface Data is strobed on the Rising Clock
Edge.
00'h: ~0.0 dB
01'h: ~4.5 dB
03'h: ~6.5 dB
EQ Feature 07'h: ~7.5 dB
4 7:0 EQ RW 0
Control1 0F'h: ~8.0 dB
1F'h: ~11.0 dB
3F'h: ~12.5 dB
FF'h: ~14.0 dB
5 Reserved 7:0 RESERVED 0 Reserved
Reserved 7 RESERVED 0 Reserved
Prescales the SCL clock line when reading data byte
from a slave device (M/S = 0)
000 : ~100 kHz SCL (default)
001 : ~125 kHz SCL
SCL Prescale 6:4 SCL_PRESCALE 0
101 : ~11 kHz SCL
110 : ~33 kHz SCL
111 : ~50 kHz SCL
Other values are NOT supported.
Remote NACK Timer Enable In slave mode (MODE = 1)
if bit is set the I2C core will automatically timeout when
REM_NACK_TIME
6
Remote NACK 3 RW 1 no acknowledge condition was detected.
R
1: Enable
0: Disable
Remote NACK Timeout.
000: 2.0 ms
001: 5.2 ms
010: 8.6 ms
Remote NACK 2:0 NACK_TIMEOUT RW 111'b 011: 11.8 ms
100: 14.4 ms
101: 18.4 ms
110: 21.6 ms
111: 25.0 ms
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