Datasheet

DS92LX1621, DS92LX1622
SNLS327I –MAY 2010–REVISED JANUARY 2014 www.ti.com
Table 1. DS92LX1621 Control Registers (continued)
Addr
Name Bits Field R/W Default Description
(Hex)
7:4 RESERVED 0 Reserved
3:2 RESERVED 0 Reserved
0: Output
12 GPIO[5] Config
1 GPIO5 DIR RW 1
1: Input
0: TRI-STATE
0 GPIO5 EN RW 1
1: Enabled
GPCR[7]
GPCR[6]
GPCR[5]
General Purpose GPCR[4] 0: LOW
13 7:0 RW 0
Control Reg GPCR[3] 1: HIGH
GPCR[2]
GPCR[1]
GPCR[0]
Table 2. DS92LX1622 Control Registers
Addr
Name Bits Field R/W Default Description
(Hex)
7-bit address of Deserializer;
7:1 DEVICE ID RW 0x60h 0x60h
(1100_000X) default
0 I
2
C Device ID
0: Device ID is from CAD
0 DES ID RW 0
1: Register I
2
C Device ID overrides CAD
7:3 RESERVED 0 Reserved
Remote Wake-up Select
1: Enable. Generate remote wakeup signal automatically
2 REM_WAKEUP RW 0 wake-up the Serializer in Standby mode
0: Disable. Puts the Serializer (M/S = 0) in Standby mode
1 Reset
when Deserializer M/S = 1
1: Resets the device to default register values. Does not
1 DIGITALRESET0 RW 0 self clear
affect device I2C Bus or Device ID
0 DIGITALRESET1 RW 0 self clear 1: Digital Reset, retains all register values
Reserved 7:6 0 Reserved
1: Output PCLK or Internal 25 MHz Oscillator clock
Auto Clock 5 AUTO_CLOCK RW 0
0: Only PCLK when valid PCLK present
Output Sleep State Select
OSS Select 4 OSS_SEL RW 0 0: Outputs = TRI-STATE, when LOCK = L
1: Outputs = LOW, when LOCK = L
SSCG Select
0000: Normal Operation, SSCG OFF
0001: fmod (KHz) PCLK/2168, fdev ±0.50%
0010: fmod (KHz) PCLK/2168, fdev ±1.00%
0011: fmod (KHz) PCLK/2168, fdev ±1.50%
2
0100: fmod (KHz) PCLK/2168, fdev ±2.00%
0101: fmod (KHz) PCLK/1300, fdev ±0.50%
0110: fmod (KHz) PCLK/1300, fdev ±1.00%
SSCG 3:0 SSCG 0 0111: fmod (KHz) PCLK/1300, fdev ±1.50%
1000: fmod (KHz) PCLK/1300, fdev ±2.00%
1001: fmod (KHz) PCLK/868, fdev ±0.50%
1010: fmod (KHz) PCLK/868, fdev ±1.00%
1011: fmod (KHz) PCLK/868, fdev ±1.50%
1100: fmod (KHz) PCLK/868, fdev ±2.00%
1101: fmod (KHz) PCLK/650, fdev ±0.50%
1110: fmod (KHz) PCLK/650, fdev ±1.00%
1111: fmod (KHz) PCLK/650, fdev +/-1.50%
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