Datasheet
DS92LV2421, DS92LV2422
SNLS321B –MAY 2010–REVISED APRIL 2013
www.ti.com
Serializer Switching Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol Parameter Conditions Min
(1)
Typ Max
(1)
Units
λ
STXBW
Serializer Jitter Transfer R
L
= 100Ω, De-Emph = disabled,
3.3 MHz
Function -3 dB Bandwidth RANDOM pattern, CLKIN = 75MHz
R
L
= 100Ω, De-Emph = disabled,
2.3 MHz
RANDOM pattern, CLKIN = 43MHz
R
L
= 100Ω, De-Emph = disabled,
0.8 MHz
RANDOM pattern, CLKIN = 10MHz
δ
STX
Serializer Jitter Transfer R
L
= 100Ω, De-Emph = disabled,
0.86 dB
Function Peaking RANDOM pattern, CLKIN = 75MHz
R
L
= 100Ω, De-Emph = disabled,
0.83 dB
RANDOM pattern, CLKIN = 43MHz
R
L
= 100Ω, De-Emph = disabled,
0.28 dB
RANDOM pattern, CLKIN = 10MHz
Deserializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol Parameter Conditions Pin/Freq. Min
(1)
Typ Max
(1)
Units
t
RCP
CLK Output Period t
RCP
= t
TCP
CLKOUT 13.3 T 100 ns
t
RDC
CLK Output Duty Cycle SSCG = OFF,
40 50 60 %
10 – 75 MHz
SSCG = ON,
35 59 65 %
10 – 20MHz
SSCG = ON,
40 53 60 %
10 – 65MHz
t
CLH
LVCMOS V
DDIO
= 1.8V, CLKOUT
Low-to-High C
L
= 4pF, 2.1 ns
Transition Time, Figure 12 OS_CLKOUT/DATA = L
V
DDIO
= 3.3V
C
L
= 4pF, 2.0 ns
OS_CLKOUT/DATA = H
t
CHL
LVCMOS V
DDIO
= 1.8V, CLKOUT
High-to-Low C
L
= 4pF, 1.6 ns
Transition Time, Figure 12 OS_CLKOUT/DATA = L
V
DDIO
= 3.3V
C
L
= 4pF, 1.5 ns
OS_CLKOUT/DATA = H
t
ROS
Data Valid before CLKOUT – V
DDIO
= 1.71 to 1.89V or 3.0 DO[23:0], CO1, CO2,
Set Up Time, Figure 16 to 3.6V CO3 0.23 0.5 UI
(2)
C
L
= 4pF (lumped load)
t
ROH
Data Valid after CLKOUT – Hold V
DDIO
= 1.71 to 1.89V or 3.0 DO[23:0], CO1, CO2,
Time, Figure 16 to 3.6V CO3 0.33 0.5 UI
(2)
C
L
= 4pF (lumped load)
t
DDLT
Deserializer Lock Time, SSC[3:0] = OFF
(3)
CLKOUT = 10MHz 3 ms
Figure 15
SSC[3:0] = OFF
(3)
CLKOUT = 75MHz 4 ms
SSC[3:0] = ON
(3)
CLKOUT = 10MHz 30 ms
SSC[3:0] = ON
(3)
CLKOUT = 65MHz 6 ms
t
DD
Des Delay - Latency, Figure 13 CLKOUT = 10 to 75 MHz 139*T 140*T ns
t
DPJ
Des Period Jitter SSC[3:0] = OFF
(4)
CLKOUT = 10 MHz 500 1000 ps
CLKOUT = 65 MHz 550 1250 ps
CLKOUT = 75 MHz 435 900 ps
(1) Specification is verified by design and is not tested in production.
(2) UI – Unit Interval is equivalent to one serialized data bit width (1UI = 1 / 28*CLK). The UI scales with clock frequency.
(3) t
PLD
and t
DDLT
is the time required by the serializer and deserializer to obtain lock when exiting power-down state with an active clock.
(4) t
DPJ
is the maximum amount the period is allowed to deviate over many samples.
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