Datasheet
DS92LV2421, DS92LV2422
SNLS321B –MAY 2010–REVISED APRIL 2013
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Deserializer DC Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol Parameter Conditions Pin/Freq. Min Typ Max Units
(1) (1)
1.8 V I/O LVCMOS DC SPECIFICATIONS – V
DDIO
= 1.71 to 1.89V
V
IH
High Level Input 1.23 V
DDIO
V
Voltage 5
V
IL
Low Level Input PDB, BISTEN GND 0.595 V
Voltage
I
IN
Input Current V
IN
= 0V or V
DDIO
−15 ±1 +15 μA
V
OH
I
OH
= −0.5 mA, RDS = L DO[23:0], CO1, CO2, CO3, V
DDI
V
DDIO
V
High Level CLKOUT, LOCK, PASS
O
Output Voltage -
0.45
V
OL
Low Level Output I
OL
= +0.5 mA, RDS = L GND 0.2 V
Voltage
I
OS
V
DDIO
= 1.8V, CLKOUT 18 mA
Output Short
V
OUT
= 0V,
Circuit Current
OS_CLKOUT/DATA = L/H
V
DDIO
= 1.8V, Outputs 18 mA
Output Short
V
OUT
= 0V,
Circuit Current
OS_CLKOUT/DATA = L/H
I
OZ
TRI-STATE PDB = 0V, OSS_SEL = 0V, Outputs -15 +15 µA
Output Current V
OUT
= 0V or V
DDIO
CML RECEIVER DC SPECIFICATIONS
V
TH
Differential Input +50 mV
Threshold High
Voltage
V
CM
= +1.2V (Internal V
BIAS
)
V
TL
Differential Input −50 mV
Threshold Low
RIN+, RIN-
Voltage
V
CM
Common Mode 1.2 V
Voltage, Internal
V
BIAS
I
IN
Input Current V
IN
= 0V or V
DDIO
-15 +15 µA
R
TI
Internal Input RIN+, 80 100 120 Ω
Termination RIN-
Resistor
LOOP THROUGH CML DRIVER OUTPUT DC SPECIFICATIONS – EQ TEST PORT
(2)
V
OD
Differential R
L
= 100Ω 542 mV
Output Voltage
V
OS
Offset Voltage R
L
= 100Ω 1.4 V
Single-ended ROUT+/-
R
T
Internal 80 100 120 Ω
Termination
Resistor
SUPPLY CURRENT
I
DD1
Deserializer 97 115 mA
Supply Current
V
DD
=
(includes load All V
DD
pins
1.89V
current) CLKOUT
Checker Board Pattern, RDS =
= 75 MHz
H,
I
DDIO1
V
DDIO
40 50 mA
C
L
= 4pF, Figure 11
=1.89
V
V
DDIO
V
DDIO
75 85 mA
= 3.6V
(2) Specification is verified by characterization and is not tested in production.
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