Datasheet

DS92LV18
SNLS156E –SEPTEMBER 2003–REVISED APRIL 2013 www.ti.com
Block Diagram
Figure 1. DS92LV18
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
Supply Voltage (V
CC
) −0.3V to +4V
LVCMOS/LVTTL Input Voltage −0.3V to (V
CC
+0.3V)
LVCMOS/LVTTL Output Voltage −0.3V to (V
CC
+0.3V)
Bus LVDS Receiver Input Voltage −0.3V to +3.9V
Bus LVDS Driver Output Voltage −0.3V to +3.9V
Bus LVDS Output Short Circuit Duration 10ms
Junction Temperature +150°C
Storage Temperature −65°C to +150°C
Lead Temperature (Soldering, 4 seconds) +260°C
Maximum Package Power Dissipation Capacity Package Derating: 80L LQFP 23.2 mW/°C above +25°C
θ
JA
43°C/W
θ
JC
11.1°C/W
ESD Rating (HBM) >2.0kV
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
Recommended Operating Conditions
Min Nom Max Units
Supply Voltage (V
CC
) 3.15 3.3 3.45 V
Operating Free Air Temperature (T
A
) −40 +25 +85 °C
Clock Rate 15 66 MHz
Supply Noise 100 mV
(p-p)
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