Datasheet

DS92LV16
SNLS138H –JANUARY 2001–REVISED APRIL 2013 www.ti.com
SERIALIZER TIMING REQUIREMENTS FOR TCLK
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Units
t
TCP
Transmit Clock Period 12.5 T 40 ns
t
TCIH
Transmit Clock High Time 0.4T 0.5T 0.6T ns
t
TCIL
Transmit Clock Low Time 0.4T 0.5T 0.6T ns
t
CLKT
TCLK Input Transition Time 3 6 ns
t
JIT
TCLK Input Jitter 80 ps (rms)
SERIALIZER SWITCHING CHARACTERISTICS
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Units
t
LLHT
Bus LVDS Low-to-High
0.2 0.4 ns
R
L
= 100Ω
Transition Time
See Figure 4
t
LHLT
Bus LVDS High-to-Low
C
L
=10pF to GND
0.2 0.4 ns
Transition Time
t
DIS
DIN (0-15) Setup to TCLK R
L
= 100Ω 2.4 ns
See Figure 7
t
DIH
DIN (0-15) Hold from TCLK
0 ns
C
L
=10pF to GND
t
HZD
DO ± HIGH to
2.3 10 ns
TRI-STATE Delay
t
LZD
DO ± LOW to
1.9 10 ns
R
L
= 100Ω
TRI-STATE Delay
See Figure 8
(1)
t
ZHD
DO ± TRI-STATE to
C
L
=10pF to GND
1.0 10 ns
HIGH Delay
t
ZLD
DO ± TRI-STATE to
1.0 10 ns
LOW Delay
t
SPW
SYNC Pulse Width 5*t
TCP
6*t
TCP
ns
R
L
= 100Ω
See Figure 9
t
PLD
Serializer PLL Lock Time 510*t
TCP
513*t
TCP
ns
t
SD
Serializer Delay R
L
= 100Ω
t
TCP
+ 1.0 t
TCP
+ 2.0 t
TCP
+ 4.0 ns
See Figure 10
t
RJIT
Random Jitter 10 ps (rms)
t
DJIT
Deterministic Jitter 35 MHz -240 140 ps
See Figure 16
80 MHz -75 100 ps
(1) Due to TRI-STATE of the Serializer, the Deserializer will lose PLL lock and have to resynchronize before data transfer.
DESERIALIZER TIMING REQUIREMENTS FOR REFCLK
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Units
t
RFCP
REFCLK Period 12.5 T 40 ns
t
RFDC
REFCLK Duty Cycle 40 50 60 %
t
RFCP
/ t
TCP
Ratio of REFCLK to TCLK 0.95 1.05
t
RFTT
REFCLK Transition Time 6 ns
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