Datasheet

DS92LV090A
SNLS025D –APRIL 2000–REVISED APRIL 2013 www.ti.com
Connection Diagram
Figure 2. Top View
Package Number PM0064
PIN DESCRIPTIONS
Pin Name Pin # Input/Output Descriptions
DO+/RI+ 27, 31, 35, 37, 41, 45, I/O True Bus LVDS Driver Outputs and Receiver Inputs.
47, 51, 55
DO−/RI− 26, 30, 34, 36, 40, 44, I/O Complimentary Bus LVDS Driver Outputs and Receiver Inputs.
46, 50, 54
D
IN
2, 6, 12, 18, 20, 22, 58, I TTL Driver Input.
60, 62
RO 3, 7, 13, 19, 21, 23, 59, O TTL Receiver Output.
61, 63
RE 17 I Receiver Enable TTL Input (Active Low).
DE 16 I Driver Enable TTL Input (Active High).
GND 4, 5, 9, 14, 25, 56 Power Ground for digital circuitry (must connect to GND on PC board). These pins
connected internally.
V
CC
10, 15, 24, 57, 64 Power V
CC
for digital circuitry (must connect to V
CC
on PC board). These pins
connected internally.
AGND 28, 33, 43, 49, 53 Power Ground for analog circuitry (must connect to GND on PC board). These pins
connected internally.
AV
CC
29, 32, 42, 48, 52 Power Analog V
CC
(must connect to V
CC
on PC board). These pins connected
internally.
NC 1, 8, 11, 38, 39 N/A Leave open circuit, do not connect.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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