Datasheet
DI+
DE0
DE1
DE2
DE3
B0
A0
B1
A1
B2
A2
B3
A3
DI-
DS91M125
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SNLS290C –AUGUST 2008–REVISED APRIL 2013
Logic Diagram
PIN DESCRIPTIONS
Number Name I/O, Type Description
1, 2, 3, 8 DE I, LVCMOS Driver enable pins: When DE is low, the driver is disabled. When DE is high,
the driver is enabled. There is a 300 kΩ pulldown resistor on each pin.
6 DI+ I, LVDS Non-inverting receiver input pin.
7 DI- I, LVDS Inverting receiver input pin.
5 GND Power Ground pin.
10, 11, 14, 15 A O, M-LVDS Non-inverting driver output pin.
9, 12, 13, 16 B O, M-LVDS Inverting driver output pin.
4 V
DD
Power Power supply pin, +3.3V ± 0.3V
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