Datasheet

DE
DE
DI0
DI1
DI2
DI3
B0
A0
B1
A1
B2
A2
B3
A3
DE
DI0
DI1
VDD
B0
A0
A1
B1
1
2
3
4
16
14
13
15
GND
DI2
DI3
DE
5
6
7
8
B2
A2
A3
B3
12
10
9
11
DS91M047
SNLS145E –JUNE 2008–REVISED APRIL 2013 www.ti.com
Connection Diagrams
PIN DESCRIPTIONS
Pin No. Name Description
2, 3, 6, 7 DI Driver input pin, LVCMOS compatible.
10, 11, 14, 15 A Non-inverting driver output pin, M-LVDS levels.
9, 12, 13, 16 B Inverting driver output pin, M-LVDS levels.
1 DE Driver enable pin: When DE is low, the driver is disabled. When DE is high and DE is low or open, the
driver is enabled. If both DE and DE are open circuit, then the driver is disabled.
8 DE Driver enable pin: When DE is high, the driver is disabled. When DE is low or open and DE is high, the
driver is enabled. If both DE and DE are open circuit, then the driver is disabled.
4 V
DD
Power supply pin, +3.3V ± 0.3V
5 GND Ground pin
TRUTH TABLE
Enables Input Outputs
DE DE DI A B
L L H
H L
H H L
All other combinations of ENABLE inputs X Z Z
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