Datasheet
DS91M040
SNLS283M –FEBRUARY 2008–REVISED APRIL 2013
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DS91M040 as Type 1 Receiving
(1)
Inputs Output
FSEN RE DE A − B RO
L L X ≥ +0.05V H
L L X ≤ −0.05V L
L L X −0.05V Undefined
≤ A-B ≤ +0.05V
L H X X Z
(1) X — Don't care condition
Z — High impedance state
DS91M040 as Type 2 Receiving
(1)
Inputs Output
FSEN RE DE A − B RO
H L X ≥ +0.15V H
H L X ≤ +0.05V L
H L X +0.05V Undefined
≤ A-B ≤ +0.15V
H H X X Z
(1) X — Don't care condition
Z — High impedance state
DS91M040 Type 1 Receiver Input Threshold Test Voltages
(1)
Applied Voltages Resulting Differential Input Voltage Resulting Common-Mode Input Receiver Output
Voltage
V
IA
V
IB
V
ID
V
ICM
R
2.400V 0.000V 2.400V 1.200V H
0.000V 2.400V −2.400V 1.200V L
3.800V 3.750V 0.050V 3.775V H
3.750V 3.800V −0.050V 3.775V L
−1.350V −1.400V 0.050V −1.375V H
−1.400V −1.350V −0.050V −1.375V L
(1) H — High Level
L — Low Level
Output state assumes that the receiver is enabled (RE = L)
DS91M040 Type 2 Receiver Input Threshold Test Voltages
(1)
Applied Voltages Resulting Differential Input Voltage Resulting Common-Mode Input Receiver Output
Voltage
V
IA
V
IB
V
ID
V
IC
R
2.400V 0.000V 2.400V 1.200V H
0.000V 2.400V −2.400V 1.200V L
3.800V 3.650V 0.150V 3.725V H
3.800V 3.750V 0.050V 3.775V L
−1.250V −1.400V 0.150V −1.325V H
−1.350V −1.400V 0.050V −1.375V L
(1) H — High Level
L — Low Level
Output state assumes that the receiver is enabled (RE = L)
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