Datasheet

DS90UR905Q, DS90UR906Q
SNLS313G –SEPTEMBER 2009–REVISED APRIL 2013 www.ti.com
DS90UR905Q Serializer Pin Functions
(1)
(continued)
Pin Name Pin # I/O, Type Description
FPD-Link II Serial Interface
DOUT+ 20 O, LVDS True Output.
The output must be AC Coupled with a 100 nF capacitor.
DOUT- 19 O, LVDS Inverting Output.
The output must be AC Coupled with a 100 nF capacitor.
Power and Ground
(2)
VDDL 7 Power Logic Power, 1.8 V ±5%
VDDP 14 Power PLL Power, 1.8 V ±5%
VDDHS 17 Power TX High Speed Logic Power, 1.8 V ±5%
VDDTX 22 Power Output Driver Power, 1.8 V ±5%
VDDIO 30 Power LVCMOS I/O Power, 1.8 V ±5% OR 3.3 V ±10%
GND DAP Ground DAP is the large metal contact at the bottom side, located at the center of the WQFN
package. Connect to the ground plane (GND) with at least 9 vias.
(2) The VDD (V
DDn
and V
DDIO
) supply ramp should be faster than 1.5 ms with a monotonic rise. If slower then 1.5 ms then a capacitor on
the PDB pin is needed to ensure PDB arrives after all the VDD have settled to the recommended operating voltage.
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