Datasheet

Slave Address
Register Address
Data
S
0
a
c
k
a
c
k
a
c
k
P
A
0
A
1
A
2
DS90UR905Q, DS90UR906Q
www.ti.com SNLS313G –SEPTEMBER 2009–REVISED APRIL 2013
Figure 33. Serial Control Bus — WRITE
Table 14. SERIALIZER — Serial Bus Control Registers
ADD ADD Register Name Bit(s) R/W Defau Function Description
(dec) (hex) lt
(bin)
0 0 Ser Config 1 7 R/W 0 Reserved Reserved
6 R/W 0 Reserved Reserved
5 R/W 0 VODSEL 0: Low
1: High
4 R/W 0 RFB 0: Data latched on Falling edge of PCLK
1: Data latched on Rising edge of PCLK
3:2 R/W 00 CONFIG 00: Control Signal Filter Disabled
01: Control Signal Filter Enabled
10: DS90UR124, DS99R124 Mode
11: DS90C124 Mode
1 R/W 0 SLEEP Note – not the same function as PowerDown (PDB)
0: normal mode
1: Sleep Mode – Register settings retained.
0 R/W 0 REG 0: Configurations set from control pins
1: Configuration set from registers (except I2C_ID)
1 1 Device ID 7 R/W 0 REG ID 0: Address from ID[x] Pin
1: Address from Register
6:0 R/W 11010 ID[X] Serial Bus Device ID, Four IDs are:
00 7b '1101 001 (h'69)
7b '1101 010 (h'6A)
7b '1101 011 (h'6B)
7b '1101 110 (h'6E)
All other addresses are Reserved.
2 2 De-Emphasis 7:5 R/W 000 De-E Setting 000: set by external Resistor
Control 001: -1 dB
010: -2 dB
011: -3.3 dB
100: -5 dB
101: -6.7 dB
110: -9 dB
111: -12 dB
4 R/W 0 De-E EN 0: De-Emphasis Enabled
1: De-Emphasis Disabled
3:0 R/W 000 Reserved Reserved
Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 37
Product Folder Links: DS90UR905Q DS90UR906Q