Datasheet

Slave Address
Register Address Slave Address
Data
S
0
1
a
c
k
a
c
k
a
c
k
a
c
k
S P
A
0
A
1
A
2
A
1
A
2
A
0
SDA
SCL
S P
START condition, or
START repeat condition
STOP condition
DS90UR905Q, DS90UR906Q
SNLS313G SEPTEMBER 2009REVISED APRIL 2013
www.ti.com
Figure 31. START and STOP Conditions
To communicate with a remote device, the host controller (master) sends the slave address and listens for a
response from the slave. This response is referred to as an acknowledge bit (ACK). If a slave on the bus is
addressed correctly, it Acknowledges (ACKs) the master by driving the SDA bus low. If the address doesn't
match a device's slave address, it Not-acknowledges (NACKs) the master by letting SDA be pulled High. ACKs
also occur on the bus when data is being transmitted. When the master is writing data, the slave ACKs after
every data byte is successfully received. When the master is reading data, the master ACKs after every data
byte is received to let the slave know it wants to receive another data byte. When the master wants to stop
reading, it NACKs after the last data byte and creates a stop condition on the bus. All communication on the bus
begins with either a Start condition or a Repeated Start condition. All communication on the bus ends with a Stop
condition. A READ is shown in Figure 32 and a WRITE is shown in Figure 33.
Note: During initial power-up, a delay of 10ms will be required before the I2C will respond.
If the Serial Bus is not required, the three pins may be left open (NC).
Table 12. ID[x] Resistor Value – DS90UR905Q Ser
Resistor Address Address
RID* k (5% tol) 7'b 8'b
0 appended
(WRITE)
0.47 7b' 110 1001 (h'69) 8b' 1101 0010 (h'D2)
2.7 7b' 110 1010 (h'6A) 8b' 1101 0100 (h'D4)
8.2 7b' 110 1011 (h'6B) 8b' 1101 0110 (h'D6)
Open 7b' 110 1110 (h'6E) 8b' 1101 1100 (h'DC)
Table 13. ID[x] Resistor Value – DS90UR906Q Des
Resistor Address Address
RID* k (5% tol) 7'b 8'b
0 appended
(WRITE)
0.47 7b' 111 0001 (h'71) 8b' 1110 0010 (h'E2)
2.7 7b' 111 0010 (h'72) 8b' 1110 0100 (h'E4)
8.2 7b' 111 0011 (h'73) 8b' 1110 0110 (h'E6)
Open 7b' 111 0110 (h'76) 8b' 1110 1100 (h'EC)
*Note: RID 0 ohm, do not connect directly to VSS (GND), this is not a valid address.
Figure 32. Serial Control Bus READ
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