Datasheet

27210
START
BIT
STOP
BIT
SYMBOL N+1
27210
START
BIT
STOP
BIT
SYMBOL N
RIN
(Diff.)
PCLK
(RFB = L)
t
DD
RGB[7:0],
HS, VS, DE
SYMBOL N-1 SYMBOL NSYMBOL N-2
80%
V
DDIO
20%
t
CLH
t
CHL
GND
GND
V
DDIO
GND
V
DDIO
RGB[n] (odd),
VS, HS
PCLK
w/ RFB = L
RGB[n] (even),
DE
GND
V
DDIO
DOUT
(Diff.)
t
DJIT
VOD (+)
t
BIT
(1 UI)
TxOUT_E_O
VOD (-)
0V
t
DJIT
DS90UR905Q, DS90UR906Q
SNLS313G –SEPTEMBER 2009–REVISED APRIL 2013 www.ti.com
Figure 8. Serializer Output Jitter
Figure 9. Checkerboard Data Pattern
Figure 10. Deserializer LVCMOS Transition Times
Figure 11. Deserializer Delay – Latency
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