Datasheet

23210
||
START
BIT
STOP
BIT
SYMBOL N+3
23210
||
START
BIT
STOP
BIT
SYMBOL N+2
23210
||
START
BIT
STOP
BIT
SYMBOL N+1
23210
||
START
BIT
STOP
BIT
SYMBOL N
R
IN
0-23
DCA, DCB
RCLK
t
DD
R
OUT
0-23
SYMBOL N-1 SYMBOL NSYMBOL N-2SYMBOL N-3
80%
20%
80%
20%
t
CLH
Deserializer
4 pF
lumped
t
CHL
PARALLEL-
TO-SERIAL
D
OUT
+
D
OUT
-
24
D
IN
R
L
TCLK
20194528
DS90UR124Q, DS90UR241Q
www.ti.com SNLS231N –SEPTEMBER 2006–REVISED MARCH 2013
VOD = (D
OUT+
) – (D
OUT−
)
Differential output signal is shown as (D
OUT+
) – (D
OUT−
), device in Data Transfer mode.
Figure 10. Serializer V
OD
Diagram
Figure 11. Deserializer LVCMOS Output Load and Transition Times
Figure 12. Deserializer Delay
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: DS90UR124Q DS90UR241Q