Datasheet

DEN
RAOFF
D
IN
TRFB
24
REN
RAOFF
TCLK
TPWDNB
SERIALIZER ± DS90UR241
PLL
Timing
and
Control
D
OUT
-
R
T
=
100
:
R
T
=
100
:
R
IN
-
DESERIALIZER ± DS90UR124
D
OUT
+ R
IN
+
PLL
Timing
and
Control
24
R
OUT
LOCK
RCLK
Clock
Recovery
Output Latch
Serial to Parallel
DC Balance Decoder
Input Latch
Parallel to Serial
DC Balance Encoder
PRE
PASS
RRFB
RPWDNB
BISTEN
BISTM
SLEW
PTOSEL
VODSEL
Video
Source
DS
90
UR
241
Serializer
RGB Data
DE
Clock
HSYNC
VSYNC
Host
( Graphics
/ Video Processor
,
ECU
)
LCD
DS
90
UR
124
Deserializer
RGB Data
DE
Clock
HSYNC
VSYNC
Display
( Infotainment
, Instrument Cluster
,
CID
)
1
Pair
FPD
-
Link II
(LVDS)
(
LVCMOS)
(
LVCMOS)
DS90UR124Q, DS90UR241Q
SNLS231N –SEPTEMBER 2006–REVISED MARCH 2013 www.ti.com
Applications Diagram
Block Diagram
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Product Folder Links: DS90UR124Q DS90UR241Q