Datasheet
48
D
IN
[19]
47
D
IN
[18]
46
D
IN
[17]
45
D
IN
[16]
44
D
IN
[15]
43
V
SS
42
V
DD
41
D
IN
[14]
40
D
IN
[13]
39
D
IN
[12]
38
D
IN
[11]
37
D
IN
[10]
13
14
15
16
17
18
19
20
21
22
23
24
RES0
V
DD
V
SS
V
DD
V
SS
DEN
D
OUT
-
D
OUT
+
V
SS
V
DD
PRE
VODSEL
12RAOFF
11TRFB
10TCLK
9TPWDNB
8RES0
7
V
DD
6
V
SS
5RES0
4
D
IN
[23]
3
D
IN
[22]
2
D
IN
[21]
1
D
IN
[20]
25
26
27
28
29
30
31
32
33
34
35
36
D
IN
[0]
D
IN
[1]
D
IN
[2]
D
IN
[3]
D
IN
[4]
V
DD
V
SS
D
IN
[5]
D
IN
[6]
D
IN
[7]
D
IN
[8]
D
IN
[9]
DS90UR241
t
BIT
(1 UI)
Sampling
Window
Ideal Data Bit
End
Ideal Data Bit
Beginning
RxIN_TOL -L RxIN_TOL -R
Ideal Center Position (t
BIT
/2)
DS90UR124Q, DS90UR241Q
SNLS231N –SEPTEMBER 2006–REVISED MARCH 2013
www.ti.com
RxIN_TOL_L is the ideal noise margin on the left of the figure, with respect to ideal.
RxIN_TOL_R is the ideal noise margin on the right of the figure, with respect to ideal.
Figure 17. Receiver Input Tolerance (RxIN_TOL) and Sampling Window
DS90UR241 Pin Diagram
Figure 18. Serializer - DS90UR241
TOP VIEW
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