Datasheet

DS90UH926Q
SNLS337J –OCTOBER 2010–REVISED APRIL 2013 www.ti.com
Table 9. Serial Control Bus Registers (continued)
ADD ADD Register Bit(s) Register Default Function Descriptions
(dec) (hex) Name Type (hex)
101 0x65 Pattern 7:5 0x00 Reserved
Generator
4 RW Pattern 18-bit Mode Select
Configuration
Generator 1: Enable 18-bit color pattern generation. Scaled patterns
18 Bits will have 64 levels of brightness and the R, G, and B
outputs use the six most significant color bits.
0: Enable 24-bit pattern generation. Scaled patterns use
256 levels of brightness.
3 RW Pattern Select External Clock Source
Generator 1: Selects the external pixel clock when using internal
External timing.
Clock 0: Selects the internal divided clock when using internal
timing
This bit has no effect in external timing mode
(PATGEN_TSEL = 0).
2 RW Pattern Timing Select Control
Generator 1: The Pattern Generator creates its own video timing as
Timing configured in the Pattern Generator Total Frame Size,
Select Active Frame Size. Horizontal Sync Width, Vertical Sync
Width, Horizontal Back Porch, Vertical Back Porch, and
Sync Configuration registers.
0: the Pattern Generator uses external video timing from
the pixel clock, Data Enable, Horizontal Sync, and Vertical
Sync signals.
1 RW Pattern Enable Inverted Color Patterns
Generator 1: Invert the color output.
Color Invert 0: Do not invert the color output.
0 RW Pattern Auto-Scroll Enable:
Generator 1: The Pattern Generator will automatically move to the
Auto-Scroll next enabled pattern after the number of frames specified
Enable in the Pattern Generator Frame Time (PGFT) register.
0: The Pattern Generator retains the current pattern.
102 0x66 Pattern 7:0 RW 0x00 Indirect This 8-bit field sets the indirect address for accesses to
Generator Address indirectly-mapped registers. It should be written prior to
Indirect reading or writing the Pattern Generator Indirect Data
Address register.
See AN-2198 (SNLA132)
103 0x67 Pattern 7:0 RW 0x00 Indirect When writing to indirect registers, this register contains the
Generator Data data to be written. When reading from indirect registers,
Indirect Data this register contains the read back value.
See AN-2198 (SNLA132
128 0x80 RX_BKSV0 7:0 R 0x00 RX BKSV0 BKSV0: Value of byte 0 of the Deserializer KSV
129 0x81 RX_BKSV1 7:0 R 0x00 RX BKSV1 BKSV1: Value of byte 1 of the Deserializer KSV
130 0x82 RX_BKSV2 7:0 R 0x00 RX BKSV2 BKSV2: Value of byte 2 of the Deserializer KSV
131 0x83 RX_BKSV3 7:0 R 0x00 RX BKSV3 BKSV3: Value of byte 3of the Deserializer KSV.
132 0x84 RX_BKSV4 7:0 R 0x00 RX BKSV4 BKSV4: Value of byte 4of the Deserializer KSV.
144 0x90 TX_KSV0 7:0 R 0x00 TX KSV0 KSV0: Value of byte 0 of the Serializer KSV.
145 0x91 TX_KSV1 7:0 R 0x00 TX KSV1 KSV1: Value of byte 1 of the Serializer KSV.
146 0x92 TX_KSV2 7:0 R 0x00 TX KSV2 KSV2: Value of byte 2 of the Serializer KSV.
147 0x93 TX_KSV3 7:0 R 0x00 TX KSV3 KSV3: Value of byte 3 of the Serializer KSV.
148 0x94 TX_KSV4 7:0 R 0x00 TX KSV4 KSV4: Value of byte 4 of the Serializer KSV.
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