Datasheet

50
51
52
53
54
55
56
57
58
59
60
1 2 3 4 5 6 7 8 9
10 11 12
27
26
25
24
23
22
21
20
19
18
17
16
45 44 43 42 41 40 39 38 37 36 35 34
DS90UH926Q
TOP VIEW
DAP = GND
I2S_WC/GPO_REG7
PDB
CAPP12
IDx
CMLOUTN
CMLOUTP
RIN-
RIN+
BISTC/INTB_IN
B2
B0/GPO_REG4
G7
G4
VDDIO
G2
G1/GPIO3
CMF
NC
CAPR12
CAPI2S B1/I2S_DB/GPO_REG5
G6
G5
G3
I2S_CLK/GPO_REG8
SCL
B6
B4
SDA
BISTEN RES1
PASS R0/GPIO0 R1/GPIO1
R2
VDDIO
R3
R4 R5 I2S_DA/GPO_REG6
VS
HS
B5
R6
B7
CAPL12
PCLK
DE
VDDIO
MODE_SEL
B3
33 32 31
R7 LOCK OEN
30
29
28
VDD33_B
MCLK
G0/GPIO2
46
47
48
RES0
OSS_SEL
VDD33_A
13 14 15
49
R[7:0]
HS
VS
PCLK
PDB
Serializer Deserializer
DE
RGB Display
720p
24-bit color depth
RGB Digital Display Interface
HOST
Graphics
Processor
FPD-Link III
1 Pair / AC Coupled
DS90UH925Q DS90UH926Q
100 ohm STP Cable
PASS
V
DDIO
OSS_SEL
SCL
SDA
INTB
I2S AUDIO
(STEREO)
OEN
LOCK
IDx
DAP DAP
0.1 PF 0.1 PF
G[7:0]
B[7:0]
SCL
SDA
IDx
R[7:0]
HS
VS
PCLK
DE
G[7:0]
B[7:0]
RIN+
RIN-
DOUT+
DOUT-
(1.8V or 3.3V)(1.8V or 3.3V)
(3.3V)
(3.3V)
V
DDIO
3
/
I2S AUDIO
(STEREO)
3
/
MODE_SEL
MODE_SEL
MCLK
PDB
INTB_IN
V
DD33
V
DD33
DS90UH926Q
SNLS337J –OCTOBER 2010–REVISED APRIL 2013 www.ti.com
Applications Diagram
DS90UH926Q Pin Diagram
Figure 1. DS90UH926Q — Top View
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