Datasheet

DS90UH926Q
SNLS337J OCTOBER 2010REVISED APRIL 2013
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AC Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
(1)(2)(3)
Symbol Parameter Conditions Pin/Freq. Min Typ Max Units
f = 5 – <15 0.5 ns
MHz
f = 15 – 85 0.2 ns
t
DCCJ
Cycle-to-Cycle Jitter
(8)(9)
SSCG = OFF
MHz
I2S_CLK = 1 - +/-2 ns
12.28MHz
VDDIO = 1.71 - 1.89V,
50 ns
Data Valid After OEN = H
CL = 12pF
t
ONS
SetupTime
VDDIO = 3.0 – 3.6V,
Figure 8
(8)(9)
50 ns
CL = 12pF
Data Tri-State After OEN = L VDDIO = 1.71 - 1.89V,
50 ns
R[7:0], G[7:0],
SetupTime CL = 12pF
B[7:0], HS,
t
ONH
Figure 8
(8)(9)
VDDIO = 3.0 – 3.6V,
VS, DE,
50 ns
CL = 12pF
PCLK, MCLK,
I2S_CLK,
VDDIO = 1.71 - 1.89V,
5 ns
Data Tri-State after OSS_ SEL =
I2S_WC,
CL = 12pF
t
SES
H, Setup Time
I2S_DA,
VDDIO = 3.0 – 3.6V,
Figure 8
(8)(9)
I2S_DB
5 ns
CL = 12pF
t
SEH
VDDIO = 1.71 - 1.89V,
5 ns
Data to Low after OSS_SEL = L
CL = 12pF
Setup Time
VDDIO = 3.0 – 3.6V,
Figure 8
(8)(9)
5 ns
CL = 12pF
BIST Mode
t
PASS
BIST PASS Valid Time 800 ns
BISTEN = H PASS
Figure 9
(8)(9)
SSCG Mode
Spread Spectrum Clocking ±0.5 ±2.5 %
f
DEV
Deviation Frequency
SeeFigure 13, Table 1 and f = 85MHz,
Table 2
(8)(9)
SSCG = ON
Spread Spectrum Clocking 8 100 kHz
f
MOD
Modulation Frequency
(8) Specification is ensured by characterization and is not tested in production.
(9) Specification is ensured by design and is not tested in production.
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