Draft DS90UB927QEVM User Guide User's Guide Literature Number: SNLU125 November 2012
Draft Chapter 1 SNLU125 – November 2012 Introduction 1.1 DS90UB927QEVM The Texas Instruments DS90UB927QEVM evaluation module (EVM) helps system designers evaluate the operation and performance of the DS90UB927Q 5MHz-85MHz FPD-Link III Serializer (SER). The device translates four FPD-Link (I) compatible LVDS data input pairs and one LVDS clock into a high-speed serialized FPD-Link III interface for transport over a single shielded twisted pair (STP) cable.
Draft Typical Application www.ti.com • 1.5 Internal Pattern Generation Typical Application The following diagram illustrates a typical rear seat entertainment application utilizing the DS90UB927Q serializer and a compatible deserializer (DS90UB926Q or DS90UB928Q).
Draft Chapter 2 SNLU125 – November 2012 Quick Start Guide 2.1 Board Setup This section describes how to quickly set up the DS90UB927QEVM with an appropriate deserializer for evaluation of the chipset in display applications. The default switches and jumper positions have been set at the factory. This setup guide assumes the user has already installed and configured the included ALP software. 1. Connect 3.3V DC power and ground from a power supply to J8 (VDD33C) and J9 (VSS). If 1.
Draft Board Setup www.ti.com Figure 2-1.
Draft Chapter 3 SNLU125 – November 2012 Evaluation Hardware Overview 3.1 Board Overview The evaluation board includes circuits and interfaces facilitating the different device features of the DS90UB927Q serializer, including power, video data, FPD-Link III interface, I2S audio, I2C control, connectors, and switches.
Draft Power www.ti.com 3.2 Power Two options are provided for powering the board. +5V DC power may be supplied at the provided barrel connector (J7, center positive), or +3.3V DC through J8 and J9. If 1.8V VDDIO power supply operation is desired, connect +1.8V DC at JP6 and select 1.8V VDDIO power from JP7. 3.3 FPD-Link Video Data Input The FPD-Link video data input accepts a 20-pin IDC cable or similar 0.1” spaced connector. Connect the clock and 4 FPD-Link (LVDS) data pairs here.
Draft Indicators • • • 3.9 www.ti.com S2/S3 (IDx Select Inputs): Select required I2C address level for IDx input. Set only one switch to ‘L’ (0x18 is default address). SW1 (PDB Reset Button): PDB pull-down switch. Press to perform a DS90UB927Q (U1) device PDB reset. SW2 (Onboard I2C Bridge Reset): Press to reset the onboard USB-to-I2C bridge controller. Indicators The INTB interrupt state may be observed from the on-board LED indicator. The LED turns off when an interrupt is indicated (INTB = LOW).
Draft Chapter 4 SNLU125 – November 2012 ALP Software 4.1 Overview The included Analog Launch PAD (ALP) software allows evaluation of the I2C control interface of the DS90UB927Q serializer. The tool provides a graphical interface for reading/writing the device registers. It also features several useful tools for manipulating advanced device-specific features, including authentication and internal pattern generation. System Requirements: Operating System: Windows XP or Vista USB version: 2.0 4.
Draft Usage 4.3 www.ti.com Usage Startup Make sure all the software has been installed and the hardware is powered on and connected to the PC. Execute “Analog LaunchPAD” from the start menu. The default start menu location is “Programs\National Semiconductor Corp\Analog LaunchPAD vx.x.x\Analog LaunchPAD”. The application should come up in the state shown below. If it does not, see “Trouble Shooting” at the end of this document.
Draft Usage www.ti.com Figure 4-2. Information Tab Figure 4-3.
Draft Usage www.ti.com Figure 4-4. Pattern Generator Tab Figure 4-5.
Draft Usage www.ti.com Figure 4-6. Register Tab with expanded register description 4.3.1 Information Tab The information tab gives basic device state information, including local device information, partner device information, and current link status.
Draft Troubleshooting • www.ti.com Internal w/ Ext. Clock The Internal timing option allows evaluation of the link performance without the need for an external source. The Video Control panel also provides several timing and pixel clock options, including several presets covering common video resolutions. 4.3.4 Registers Tab The Registers Tab allows for direct reading/writing of individual registers or register bits located on the local device.
Draft Troubleshooting www.ti.com Figure 4-8. Windows XP Analog LaunchPAD USB Driver The software should start with only “DS90UH92x” in the “Devices” pull down menu. If there are more devices then the software is most likely in demo mode. When the ALP is operating in demo mode there is a “(Demo Mode)” indication in the lower left of the application status bar as shown below.
Draft Troubleshooting www.ti.com Figure 4-9. Analog LaunchPAD in Demo Mode Disable the demo mode by selecting the “Preferences” pull down menu and un-checking “Enable Demo Mode”. Figure 4-10. Analog LaunchPAD Preferences Menu After demo mode is disabled, the ALP software will poll the ALP hardware. The ALP software will update and have only “DS90UH92x” under the “Devices” pull down menu.
Draft Chapter 5 SNLU125 – November 2012 Additional Information 5.1 Related Documents Additional information may be found in the device product folder at www.ti.com • DS90UB927Q device datasheet • DS90UB928Q device datasheet • DS90UB926Q device datasheet • TI Application Note AN-2173 • TI Application Note AN-2198 5.
Draft Appendix A SNLU125 – November 2012 Board Schematic 18 Additional Information SNLU125 – November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated
Draft Board Stackup www.ti.com A.1 Board Stackup Figure A-1.
Draft DS90UB927Q Serializer A.2 www.ti.com DS90UB927Q Serializer Figure A-2.
Draft USB-to-I2C Controller www.ti.com A.3 USB-to-I2C Controller Figure A-3.
Draft Power A.4 www.ti.com Power Figure A-4.
Draft Appendix B SNLU125 – November 2012 Bill of Materials B.1 DS90UB927QEVM BOM Table B-1. DS90UB927QEVM BOM Item 1 Qty 2 Reference Description Manufacturer CR1,CR2 SUPPRESSOR ESD 24VDC 0603 SMD Littelfuse Part Number PGB1010603MR C1,C5,C8, C9,C10,C1 2,C13,C14, CAP CER .1UF 50V 10% C16,C17,C X7R 0603 22,C26,C2 8,C33,C35, C37 Murata GRM188R71H104KA9 3D GCM155R71C104KA5 5D 2 16 3 2 C2,C3 CAP CER .1UF 16V X7R 0402 Murata 4 2 C6,C7 CAP CERAMIC 4.
Draft DS90UB927QEVM BOM www.ti.com Table B-1. DS90UB927QEVM BOM (continued) Item 24 Qty Reference Description Manufacturer 3M Part Number 19 1 J3 CONN HEADER 20 POS STRGHT GOLD. 20 1 J4 Automotive HSD Connector, RA Rosenberger 21 1 J5 CONN HEADER 4POS .100 VERT GOLD Molex 22-11-2042 22 1 J6 CONN RECEPT MINI USB2.0 5POS Hirose UX60-MB-5ST 23 1 J7 CONN POWER JACK 2.1MM.
Draft DS90UB927QEVM BOM www.ti.com Table B-1. DS90UB927QEVM BOM (continued) Item Qty Reference Description Manufacturer 46 6 R36,R37,R 38,R39,R4 0,R92 RES 10.
Draft DS90UB927QEVM BOM www.ti.com Table B-1. DS90UB927QEVM BOM (continued) Item 26 Qty Reference Description Manufacturer Part Number TI LP3982IMM3.3/NOPB 73 1 U6 IC REG LDO 300MA 3.3V 8MSOP 74 1 Y1 CRYSTAL 8.000 MHZ 18PF SMD Abracon 75 1 - PCB - Bill of Materials ABM3-8.
Draft Appendix C SNLU125 – November 2012 Board Layout C.1 Board Layers The following mechanical drawings illustrate the physical layout and stack-up of the 4-layer DS90UB927QEVM evaluation board: Figure C-1. Top Silkscreen SNLU125 – November 2012 Submit Documentation Feedback Figure C-2.
Draft Board Layers www.ti.com Figure C-3. Internal Layer 1: Ground 28 Figure C-4.
Draft Board Layers www.ti.com Figure C-5. Bottom Copper Figure C-6.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
