Datasheet

DIN0
DIN1
DIN2
DIN3
DIN4
DIN5
DIN6
DIN7
DIN8
DIN9
DIN10
DIN11
HS
VS
PCLK
PDB
DOUT+
DOUT-
VDDCML
DAP (GND)
VDDPLL
VDDT
1.8V
DS90UB913Q (SER)
C4
C5
C10
C11
C1
C2
NOTE:
C1 - C2 = 0.1 PF (50 WV)
C3 ± C7 = 0.01 PF
C8 - C12 = 0.1 PF
C13 - C14 = 4.7 PF
C15 = 22 PF
C16 - C17 = >100 pF
RPU = 1 k: to 4.7 k:
RID (see ID[x] Resistor Value Table)
FB1 - FB4: Impedance = 1 k: (@ 100 MHz)
low DC resistance (<1:)
The "Optional" components shown are
provisions to provide higher system noise
immunity and will therefore result in higher
performance.
LVCMOS
Parallel
Bus
Serial
FPD-Link III
Interface
MODE
ID[X]
VDDIO
RES
C8
LVCMOS
Control
Interface
VDDIO
1.8V
RID
10 k:
C13
C3
FB1
FB2
VDDD
C7
SCL
VDDIO
C17
RPU
C16
RPU
SDA
I2C
Bus
Interface
FB3
FB4
GPO[1]
GPO[0]
GPO
Control
Interface
C6
Optional
Optional
GPO[3]
GPO[2]
C9
1.8V
C12
1.8V
C15
C14
1.8V
1.8V
RID
10 k:
DS90UB913Q, DS90UB914Q
www.ti.com SNLS420B –JULY 2012–REVISED APRIL 2013
Figure 45 shows the typical connection of a DS90UB913Q Serializer
Figure 45. DS90UB913Q Typical Connection Diagram — Pin Control
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