Datasheet
80%
20%
80%
20%
t
CLH
Deserializer
8 pF
lumped
t
CHL
||
LOCK
PDB
VDDIO/2
|
TRI-STATE
t
DDLT
R
IN±
VDDIO/2
||
SYMBOL N
||
SYMBOL N-1
||
SYMBOL N-2
||
SYMBOL N-3SYMBOL N-4
||
DOUT+-
|
PCLK
t
SD
D
IN
SYMBOL N+1SYMBOL N SYMBOL N+2 SYMBOL N+3
| |
|
|
|
| |
| |
| |
VDDIO/2
0V
VDDIO/2
PCLK
D
OUT
±
Output Active
t
PLD
PDB
TRI-STATE TRI-STATE
Setup
V
DDIO
/2
Hold
t
DIH
t
DIS
PCLK
DINn
t
TCP
0V
V
DDIO
/2
V
DDIO
/2 V
DDIO
/2V
DDIO
/2
V
DDIO
DS90UB913Q, DS90UB914Q
SNLS420B –JULY 2012–REVISED APRIL 2013
www.ti.com
Figure 12. Serializer Setup/Hold Times
Figure 13. Serializer PLL Lock Time
Figure 14. Serializer Delay
Figure 15. Deserializer Data Lock Time
Figure 16. Deserializer LVCMOS Output Load and Transition Times
18 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: DS90UB913Q DS90UB914Q