Datasheet

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JP10
HEADER 16X2
R76
0
R77
0
R78
0
R79
0
R81
0
R82
0
R83
0
R68
0
R84
0
R67
0
DIN2
DIN4
DIN6
DIN8
SDA
SCL
CLKO
DIN0
R70
0
R69
0
R73
0
R72
0
DIN3
DIN5
DIN7
DIN9
HS
VS
R75
0
DIN1
GND
VDD5V
Header to External Imager
NO-STUFF: JP10, R67-70, 72-79, 81-84
BUS AT 100MB/S, MATCH LENGTH TO 500MIL JP1 TO JP10
CY2302
VDD
7
OUT1
6
FS1
5
FBIN
1
IN
2
GND
3
FS0
4
OUT2
8
U20
C101
0.1UF
C102
0.01UF
C103
10UF
L15
2.2UH
S_PCLK
R102 22 Ohm_OPEN S_PCLK
PCLK
GND GND
R101 22 Ohm PCLK_U20
VDD3P3
GND
S_PCLK
PCLK PCLK_U20
S_PCLK
R104
0
PCLK_IN
PCLK_IN
PCLK_OUT
PCLK_OUT
R105
0
PCLK_IN
PCLK_OUT_BYPASS
PCLK_OUT_FREQ_MULT
R106
0 ohm
Layout Note: R104 Closer to JP10 pin 17 ,
R107
0_OPEN
PCLK PCLK_U20
R108
0_OPEN
DS90UB913A-CXEVM Serializer Board Schematic www.ti.com
3. Header Adapter to Imager for Serializer board
24
Schematics SNLU135–JUNE 2013
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