Datasheet
DS90UB904Q
Deserializer
48-Pin WQFN
(Top View)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
36
35
34
33
32
31
30
29
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
ROUT[14]
ROUT[15]
ROUT[17]
ROUT[18]
ROUT[20]
PCLK
SCL
SDA
ROUT[3]
ROUT[2]
ROUT[0]
V
DDIO1
GPI[1]
GPI[0]
PDB
V
DDR
V
DDSSCG
ROUT[19]
V
DDIO3
ROUT[16] ROUT[1]
GPI[3]
GPI[2]
LOCK
ROUT[13]
ROUT[11]
ROUT[6]
ROUT[4]
ROUT[12]
ROUT[5]
ROUT[10]
V
DDD
ROUT[9]
MODE
RES
V
DDPLL
BISTEN
RES
RIN-
RIN+
V
DDCML
RES/CMLOUTN
RES/CMLOUTP
ID[x]
PASS
ROUT[8]
ROUT[7]
V
DDIO2
DAP = GND
DS90UB903Q, DS90UB904Q
www.ti.com
SNLS332E –JUNE 2010–REVISED APRIL 2013
DS90UB904Q Pin Diagram
Deserializer - DS90UB904Q
48 Pin WQFN (Top View)
See Package Number RHS0048A
DS90UB904Q DESERIALIZER PIN DESCRIPTIONS
Pin Name Pin No. I/O, Type Description
LVCMOS PARALLEL INTERFACE
ROUT[20:0] 5, 6, 8, 9, 10, Outputs, Parallel data outputs.
11, 12, 13, 14, LVCMOS
15, 16, 18, 19,
21, 22, 23, 24,
25, 26, 27, 28
Output, Pixel Clock Output Pin.
PCLK 4
LVCMOS Strobe edge set by RRFB control register.
GENERAL PURPOSE INPUT (GPI)
General-purpose input pins can be used to control and respond to various
GPI[3:0] 30, 31, 32, 33 Input, LVCMOS
commands.
BIDIRECTIONAL CONTROL BUS - I
2
C COMPATIBLE
Input/Output, Clock line for the bidirectional control bus communication
SCL 2
Open Drain SCL requires an external pull-up resistor to V
DDIO
.
Input/Output, Data line for bidirectional control bus communication
SDA 1
Open Drain SDA requires an external pull-up resistor to V
DDIO
.
I
2
C Mode select
MODE = L, Master mode; Device generates and drives the SCL clock line, where
Input, LVCMOS required such as Read. Device is connected to slave peripheral on the bus.
MODE 47
w/ pull up MODE = H, Slave mode (default); Device accepts SCL clock input and attached to an
I
2
C controller master on the bus. Slave mode does not generate the SCL clock, but
uses the clock generated by the Master for the data transfers.
Device ID Address Select
ID[x] 48 Input, analog
Resistor to Ground and 10 kΩ pull-up to 1.8V rail. See Table 4.
CONTROL AND CONFIGURATION
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