Datasheet

Host
--
FPGA
--
Video
Processor
DS90UB904Q
Deserializer
DS90UB903Q
Serializer
DIN[20:0]
PCLK
CMOS
Image
Sensor
I C
2
ROUT[20:0]
PCLK
I C
2
SDA
SCL
SDA
SCL
µC
DS90UB903Q, DS90UB904Q
www.ti.com SNLS332E –JUNE 2010–REVISED APRIL 2013
Table 4. ID[x] Resistor Value – DS90UB904Q
ID[x] Resistor Value - DS90UB904Q Des
Resistor RID Ω (±0.1%) Address 7'b
(1)
Address 8'b 0 appended (WRITE)
0, GND 7b' 110 0000 (h'60) 8b' 1100 0000 (h'C0)
2.0k 7b' 110 0001 (h'61) 8b' 1100 0010 (h'C2)
4.7k 7b' 110 0010 (h'62) 8b' 1100 0100 (h'C4)
8.2k 7b' 110 0011 (h'63) 8b' 1101 0110 (h'C6)
12.1k 7b' 110 0100 (h'64) 8b' 1101 1000 (h'C8)
39.0k 7b' 110 0110 (h'66) 8b' 1100 1100 (h'CC)
(1) Specification is ensured by design.
CAMERA MODE OPERATION
In Camera mode, I
2
C transactions originate from the Deserializer from the Master controller (Figure 30). The I
2
C
slave core in the Deserializer will detect if a transaction is intended for the Serializer or a slave at the Serializer.
Commands are sent over the bidirectional control channel to initiate the transactions. The Serializer will receive
the command and generate an I
2
C transaction on its local I
2
C bus. At the same time, the Serializer will capture
the response on the I
2
C bus and return the response as a command on the forward channel link. The
Deserializer parses the response and passes the appropriate response to the Deserializer I
2
C bus.
To configure the devices for camera mode operation, set the Serializer MODE pin to Low and the Deserializer
MODE pin to High. Before initiating any I
2
C commands, the Deserializer needs to be programmed with the target
slave device addresses and Serializer device address. SER_DEV_ID Register 0x07h sets the Serializer device
address and SLAVE_x_MATCH/SLAVE_x_INDEX registers 0x08h~0x17h set the remote target slave addresses.
The slave address match registers must also be set. In slave mode the address register is compared with the
address byte sent by the I
2
C master. If the addresses are equal to any of registers values, the I
2
C slave will
acknowledge the transaction to the I
2
C master allowing reads or writes to target device.
Figure 30. Typical Camera System Diagram
DISPLAY MODE OPERATION
In Display mode, I
2
C transactions originate from the controller attached to the Serializer. The I
2
C slave core in
the Serializer will detect if a transaction targets (local) registers within the Serialier or the (remote) registers within
the Deserializer or a remote slave connected to the I
2
C master interface of the Deserializer. Commands are sent
over the forward channel link to initiate the transactions. The Deserializer will receive the command and generate
an I
2
C transaction on its local I
2
C bus. At the same time, the Deserializer will capture the response on the I
2
C
bus and return the response as a command on the bidirectional control channel. The Serializer parses the
response and passes the appropriate response to the Serializer I
2
C bus.
The physical device ID of the I
2
C slave in the Serializer is determined by the analog voltage on the ID[x] input. It
can be reprogrammed by using the SER_DEV_ID register and setting the bit . The device ID of the logical I
2
C
slave in the Deserializer is determined by programming the DES ID in the Serializer. The state of the ID[x] input
on the Deserializer is used to set the device ID. The I
2
C transactions between Ser/Des will be bridged between
the host to the remote slave.
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