Datasheet

1 / fmod
F
PCLK+
F
PCLK-
fdev
fdev (max)
fdev (min)
F
PCLK
Frequency
Time
0.52
0.55
0.54
0.57
0.59
0.60
0.62
1.0E+04
1.0E+06
1.0E+07
JITTER FREQUENCY (Hz)
JITTER AMPLITUDE (UI)
0.53
0.56
0.58
0.61
1.0E+05
DS90UB903Q, DS90UB904Q
www.ti.com SNLS332E –JUNE 2010–REVISED APRIL 2013
Figure 21. Typical Deserializer Input Jitter Tolerance Curve at 43 MHz
Figure 22. Spread Spectrum Clock Output Profile
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