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IN1-

IN1+

IN2+

IN2-

OUT2-

OUT2+

OUT1+

OUT1-

OUT1

OUT2

IN2

IN1

AND

GND

IN1-

IN1+

IN2+

IN2-

OUT2-

OUT2+

OUT1+

OUT1-

OUT1

OUT2

IN2

IN1

DS90LV049Q

www.ti.com

SNLS300D –MAY 2008–REVISED APRIL 2013

DS90LV049Q Automotive LVDS Dual Line Driver and Receiver Pair

Check for Samples: DS90LV049Q

FEATURES

DESCRIPTION

The DS90LV049Q is a dual CMOS flow-through

• AECQ-100 Grade 1

differential line driver-receiver pair designed for

• Up to 400 Mbps Switching Rates

applications requiring ultra low power dissipation,

• Flow-Through Pinout Simplifies PCB Layout

exceptional noise immunity, and high data

throughput. The device is designed to support data

• 50 ps Typical Driver Channel-to-Channel Skew

rates in excess of 400 Mbps utilizing Low Voltage

• 50 ps Typical Receiver Channel-to-Channel

Differential Signaling (LVDS) technology.

Skew

The DS90LV049Q drivers accept LVTTL/LVCMOS

• 3.3 V Single Power Supply Design

signals and translate them to LVDS signals. The

• TRI-STATE Output Control

receivers accept LVDS signals and translate them to

• Internal Fail-Safe Biasing of Receiver Inputs

3 V CMOS signals. The LVDS input buffers have

internal failsafe biasing that places the outputs to a

• Low Power Dissipation (70 mW at 3.3 V Static)

known H (high) state for floating receiver inputs. In

• High Impedance on LVDS Outputs on Power

addition, the DS90LV049Q supports a TRI-STATE

Down

function for a low idle power state when the device is

• Conforms to TIA/EIA-644-A LVDS Standard

not in use.

• Available in Low Profile 16 Pin TSSOP

The EN and EN inputs are ANDed together and

Package

control the TRI-STATE outputs. The enables are

common to all four gates.

Connection Diagram

Functional Diagram

Figure 1. TSSOP Package

See Package Number PW0016A

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (17 pages)

PAGE 1
DS90LV049Q www.ti.com SNLS300D – MAY 2008 – REVISED APRIL 2013 DS90LV049Q Automotive LVDS Dual Line Driver and Receiver Pair Check for Samples: DS90LV049Q FEATURES DESCRIPTION • • • • • The DS90LV049Q is a dual CMOS flow-through differential line driver-receiver pair designed for applications requiring ultra low power dissipation, exceptional noise immunity, and high data throughput.
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DS90LV049Q SNLS300D – MAY 2008 – REVISED APRIL 2013 www.ti.com Truth Table EN EN LVDS Out LVCMOS Out L or Open L or Open OFF OFF H L or Open ON ON L or Open H OFF OFF H H OFF OFF These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) −0.3 V to +4 V Supply Voltage (VDD) −0.3 V to (VDD + 0.
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DS90LV049Q www.ti.com SNLS300D – MAY 2008 – REVISED APRIL 2013 Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified. Parameter Test Conditions (1) (2) (3) Pin Min Typ Max Units V LVCMOS Input DC Specifications (Driver Inputs, ENABLE Pins) VIH Input High Voltage 2.0 VDD VIL Input Low Voltage GND 0.
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DS90LV049Q SNLS300D – MAY 2008 – REVISED APRIL 2013 www.ti.com Switching Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified. Parameter Test Conditions (1) (2) Min Typ Max Units LVDS Outputs (Driver Outputs) tPHLD Differential Propagation Delay High to Low 0.7 2 ns tPLHD Differential Propagation Delay Low to High 0.7 2 ns tSKD1 Differential Pulse Skew |tPHLD − tPLHD| (3) (4) 0 0.05 0.
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DS90LV049Q www.ti.com SNLS300D – MAY 2008 – REVISED APRIL 2013 Parameter Measurement Information Power Supply VDD EN DOUT+ SMU DIN D SMU 100 : SMU DOUT- Figure 2. Driver VOD and VOS Test Circuit Power Supply Oscilloscope Z0 = 50 : C = 15 pF Distributed Signal Generator VDD EN DOUT+ DIN Transmission Line 50 : D Transmission Line DC Block Transmission Line DC Block 100 : DOUT- 50 : 50 : Z0 = 50 : C = 15 pF Distributed Figure 3.
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DS90LV049Q SNLS300D – MAY 2008 – REVISED APRIL 2013 www.ti.com Parameter Measurement Information (continued) Power Supplies 2.4 V Oscilloscope VDD 1 k: DOUT+ DIN 3.3 V 950 : Transmission Line D 100 : 50 : Transmission Line DOUT- 1 k: EN 950 : 2.4 V Z0 = 50 : C = 15 pF Distributed Signal Generator 50 : Z0 = 50 : C = 15 pF Distributed 50 : Transmission Line Figure 5. Driver TRI-STATE Delay Test Circuit Figure 6.
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DS90LV049Q www.ti.com SNLS300D – MAY 2008 – REVISED APRIL 2013 Parameter Measurement Information (continued) Figure 8. Receiver Propagation Delay and Transition Time Waveforms Power Supplies VDD 1 k: Oscilloscope 2.5 V RIN+ ROUT 1.4 V 100 : 950 : R Transmission Line 1.0 V 50 : RIN- Z0 = 50 : C = 15 pF Distributed Signal Generator Z0 = 50 : C = 15 pF Distributed EN 50 : Transmission Line Figure 9.
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DS90LV049Q SNLS300D – MAY 2008 – REVISED APRIL 2013 www.ti.com Parameter Measurement Information (continued) 3V EN 1.5 V 1.5 V 0V 3V 1.5 V 1.5 V 0V EN tPHZ OUT tPZH VOH 0.5 V 50% VDD / 2 tPZL VDD / 2 tPLZ 50% 0.5 V OUT VOL Figure 10. Receiver TRI-STATE Delay Waveforms Typical Application Figure 11.
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DS90LV049Q www.ti.com SNLS300D – MAY 2008 – REVISED APRIL 2013 The DS90LV049Q has a flow-through pinout that allows for easy PCB layout. The LVDS signals on one side of the device easily allows for matching electrical lengths of the differential pair trace lines between the driver and the receiver as well as allowing the trace lines to be close together to couple noise as common-mode. Noise isolation is achieved with the LVDS signals on one side of the device and the TTL signals on the other side.
PAGE 10
DS90LV049Q SNLS300D – MAY 2008 – REVISED APRIL 2013 www.ti.com CABLES AND CONNECTORS, GENERAL COMMENTS When choosing cable and connectors for LVDS it is important to remember: Use controlled impedance media. The cables and connectors you use should have a matched differential impedance of about 100 Ω. They should not introduce major impedance discontinuities. Balanced cables (for example, twisted pair) are usually better than unbalanced cables (ribbon cable, simple coax.
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DS90LV049Q www.ti.com SNLS300D – MAY 2008 – REVISED APRIL 2013 Typical Performance Curves Differential Output Voltage vs Load Resistor Power Supply Current vs Frequency 90 VDD = 3.3 V TA = 25o C Power Supply Current - IDD [mA] Differential Output Voltage - VOD [V] 0.45 0.40 0.35 0.30 0.25 40 60 80 100 120 140 160 75 60 VDD = 3.3 V TA = 25o C RL = 100 : CL = 15 pF VID = 0.4 V VIN = 3.3 V All Switching 45 Single Receiver Switching 30 Single Driver Switching 15 0 0.
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DS90LV049Q SNLS300D – MAY 2008 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision C (April 2013) to Revision D • 12 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing DS90LV049QMTX/NOPB TSSOP PW 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.95 B0 (mm) K0 (mm) P1 (mm) 8.3 1.6 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS90LV049QMTX/NOPB TSSOP PW 16 2500 367.0 367.0 35.
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