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DS90LV028A

www.ti.com

SNLS013E –JUNE 1998–REVISED APRIL 2013

DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver

Check for Samples: DS90LV028A

FEATURES

DESCRIPTION

The DS90LV028A is a dual CMOS differential line

• >400 Mbps (200 MHz) switching rates

receiver designed for applications requiring ultra low

• 50 ps differential skew (typical)

power dissipation, low noise and high data rates. The

• 0.1 ns channel-to-channel skew (typical)

device is designed to support data rates in excess of

400 Mbps (200 MHz) utilizing Low Voltage Differential

• 2.5 ns maximum propagation delay

Signaling (LVDS) technology.

• 3.3V power supply design

The DS90LV028A accepts low voltage (350 mV

• Flow-through pinout

typical) differential input signals and translates them

• Power down high impedance on LVDS inputs

to 3V CMOS output levels. The receiver also

• Low Power design (18mW @ 3.3V static)

supports open, shorted and terminated (100Ω) input

fail-safe. The receiver output will be HIGH for all fail-

• Interoperable with existing 5V LVDS networks

safe conditions. The DS90LV028A has a flow-through

• Accepts small swing (350 mV typical)

design for easy PCB layout.

differential signal levels

The DS90LV028A and companion LVDS line driver

• Supports open, short and terminated input fail-

provide a new alternative to high power PECL/ECL

safe

devices for high speed point-to-point interface

• Conforms to ANSI/TIA/EIA-644 Standard

applications.

• Industrial temperature operating range

– (−40°C to +85°C)

• Available in SOIC and space saving WSON

package

Connection Diagram

Figure 1. SOIC

See Package Number D (R-PDSO-G8)

Figure 2. WSON (Top View)

See Package Number NGN008A

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (18 pages)

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DS90LV028A www.ti.com SNLS013E – JUNE 1998 – REVISED APRIL 2013 DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver Check for Samples: DS90LV028A FEATURES DESCRIPTION • • • • • • • • • • The DS90LV028A is a dual CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.
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DS90LV028A SNLS013E – JUNE 1998 – REVISED APRIL 2013 www.ti.com Functional Diagram Truth Table INPUTS OUTPUT [RIN+] − [RIN−] ROUT VID ≥ 0.1V H VID ≤ −0.1V L Full Fail-safe OPEN/SHORT or Terminated H These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) −0.
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DS90LV028A www.ti.com SNLS013E – JUNE 1998 – REVISED APRIL 2013 Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. Symbol Parameter (1) (2) Conditions VTH Differential Input High Threshold VTL Differential Input Low Threshold IIN Input Current VCM = +1.2V, 0V, 3V VIN = +2.8V (3) Pin Min RIN+, RIN− −100 VCC = 3.6V or 0V VIN = 0V VIN = +3.6V VOH VCC = 0V mV ±1 +10 μA −10 ±1 +10 μA +20 μA V 2.7 3.1 V IOH = −0.
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DS90LV028A SNLS013E – JUNE 1998 – REVISED APRIL 2013 www.ti.com PARAMETER MEASUREMENT INFORMATION Figure 3. Receiver Propagation Delay and Transition Time Test Circuit Figure 4. Receiver Propagation Delay and Transition Time Waveforms TYPICAL APPLICATION Balanced System Figure 5.
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DS90LV028A www.ti.com SNLS013E – JUNE 1998 – REVISED APRIL 2013 APPLICATION INFORMATION General application guidelines and hints for LVDS drivers and receivers may be found in the following application notes: LVDS Owner's Manual (SNLA187), AN-808 (SNLA028), AN-977 (SNLA166), AN-971 (SNLA165), AN-916 (SNLA219), AN-805 (SNOA233), AN-903 (SNLA034). LVDS drivers and receivers are intended to be primarily used in an uncomplicated point-to-point configuration as is shown in Figure 5.
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DS90LV028A SNLS013E – JUNE 1998 – REVISED APRIL 2013 www.ti.com DIFFERENTIAL TRACES Use controlled impedance traces which match the differential impedance of your transmission medium (ie. cable) and termination resistor. Run the differential pair trace lines as close together as possible as soon as they leave the IC (stubs should be < 10mm long). This will help eliminate reflections and ensure noise is coupled as common-mode.
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DS90LV028A www.ti.com SNLS013E – JUNE 1998 – REVISED APRIL 2013 PROBING LVDS TRANSMISSION LINES Always use high impedance (> 100kΩ), low capacitance (< 2 pF) scope probes with a wide bandwidth (1 GHz) scope. Improper probing will give deceiving results. CABLES AND CONNECTORS, GENERAL COMMENTS When choosing cable and connectors for LVDS it is important to remember: Use controlled impedance media. The cables and connectors you use should have a matched differential impedance of about 100Ω.
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DS90LV028A SNLS013E – JUNE 1998 – REVISED APRIL 2013 www.ti.
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DS90LV028A www.ti.
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DS90LV028A SNLS013E – JUNE 1998 – REVISED APRIL 2013 www.ti.
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DS90LV028A www.ti.com SNLS013E – JUNE 1998 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision D (April 2013) to Revision E • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DS90LV028ATLD WSON NGN 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 DS90LV028ATLD/NOPB WSON NGN 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 DS90LV028ATMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS90LV028ATLD WSON NGN 8 1000 210.0 185.0 35.0 DS90LV028ATLD/NOPB WSON NGN 8 1000 213.0 191.0 55.0 DS90LV028ATMX SOIC D 8 2500 367.0 367.0 35.0 DS90LV028ATMX/NOPB SOIC D 8 2500 367.0 367.0 35.
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MECHANICAL DATA NGN0008A LDC08A (Rev B) www.ti.
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