Datasheet

DS90LV001
SNLS067E JANUARY 2001REVISED APRIL 2013
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AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
(1)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low R
L
= 100, C
L
= 5pF 1.0 1.4 2.0 ns
Figure 4 and Figure 5
t
PLHD
Differential Propagation Delay Low to High 1.0 1.4 2.0 ns
t
SKD1
Pulse Skew |t
PLHD
t
PHLD
|
(2)(3)
20 200 ps
t
SKD3
Part to Part Skew
(2)(4)
0 60 ps
t
SKD4
Part to Part Skew
(2)(5)
400 ps
t
LHT
Rise Time
(2)
R
L
= 100, C
L
= 5pF 200 320 450 ps
Figure 4 and Figure 6
t
HLT
Fall Time
(2)
200 310 450 ps
t
PHZ
Disable Time (Active High to Z) R
L
= 100, C
L
= 5pF 3 25 ns
Figure 7 and Figure 8
t
PLZ
Disable Time (Active Low to Z) 3 25 ns
t
PZH
Enable Time (Z to Active High) 25 45 ns
t
PZL
Enable Time (Z to Active Low) 25 45 ns
t
DJ
LVDS Data Jitter, Deterministic (Peak-to-Peak)
(6)
V
ID
= 300mV; PRBS = 2
23
1 data; V
CM
100 135 ps
= 1.2V at 800Mbps (NRZ)
t
RJ
LVDS Clock Jitter, Random
(6)
V
ID
= 300mV; V
CM
= 1.2V at 400MHz
2.2 3.5 ps
clock
(1) All typical are given for V
CC
= +3.3V and T
A
= +25°C, unless otherwise stated.
(2) The parameters are ensured by design. The limits are based on statistical analysis of the device performance over the PVT (process,
voltage and temperature) range.
(3) t
SKD1
, |t
PLHD
t
PHLD
|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative
going edge of the same channel.
(4) t
SKD3
, Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This
specification applies to devices at the same V
CC
and within 5°C of each other within the operating temperature range.
(5) t
SKD4
, Part to Part Skew, is the differential channel-to- channel skew of any event between devices. This specification applies to devices
over recommended operating temperature and voltage ranges, and across process distribution. t
SKD4
is defined as |Max Min|
differential propagation delay.
(6) The parameters are ensured by design. The limits are based on statistical analysis of the device performance over the PVT range with
the following test equipment setup: HP8133A (pattern pulse generator), 5 feet of RG142B cable with DUT test board and HP83480A
(digital scope mainframe) with HP83484A (50GHz scope module). The HP8133A with RG142B cable exhibit a t
DJ
= 21ps and t
RJ
=
1.8ps.
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