Datasheet
Table Of Contents
- Features
- Description
- Absolute Maximum Ratings
- Recommended Operating Conditions
- Electrical Characteristics
- Recommended Transmitter Input Characteristics
- Transmitter Switching Characteristics
- Receiver Switching Characteristics
- Chipset RSKM Characteristics
- AC Timing Diagrams
- Applications Information
- NEW FEATURES DESCRIPTION
- CLOCK JITTER
- RSKM - RECEIVER SKEW MARGIN
- RSKMD - RECEIVER SKEW MARGIN WITH DESKEW
- POWER DOWN
- CONFIGURATIONS
- CABLE TERMINATION
- HOW TO CONFIGURE FOR BACKPLANE APPLICATIONS
- HOW TO CONFIGURE FOR CABLE INTERCONNECT APPLICATIONS
- SUPPLY BYPASS RECOMMENDATIONS
- INPUT SIGNAL QUALITY REQUIREMENTS - TRANSMITTER
- UNUSED LVDS OUTPUTS
- RECEIVER OUTPUT DRIVE STRENGTH
- LVDS INTERCONNECT GUIDELINES
- Typical Data Rate vs Cable Length Curve
- Data Rate vs Cable Length Test Procedure
- Revision History

DS90CR483A, DS90CR484A
SNLS291A –APRIL 2008–REVISED APRIL 2013
www.ti.com
Figure 6. DS90CR484A (Receiver) Setup/Hold and High/Low Times
Figure 7. DS90CR483A (Transmitter) Propagation Delay - Latency
Figure 8. DS90CR484A (Receiver) Propagation Delay - Latency
Figure 9. DS90CR483A (Transmitter) Phase Lock Loop Set Time
8 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: DS90CR483A DS90CR484A