Datasheet

DS90CR483A, DS90CR484A
SNLS291A –APRIL 2008–REVISED APRIL 2013 www.ti.com
Receiver Switching Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol Parameter Min Typ Max Units
RCOL RxCLK OUT Low Time, (Figure 6)
(1)
f = 112 MHz 3.5 ns
f = 66 MHz 6.0 ns
RSRC RxOUT Setup to RxCLK OUT, f = 112 MHz 2.4 ns
(Figure 6)
(1)
f = 66 MHz 3.6 ns
RHRC RxOUT Hold to RxCLK OUT, f = 112 MHz 3.4 ns
(Figure 6)
(1)
f = 66 MHz 7.0 ns
RPDL Receiver Propagation Delay - Latency, (Figure 8) 3(TCIP)+4.0 3(TCIP)+4.8 3(TCIP)+6.5 ns
RPLLS Receiver Phase Lock Loop Set, (Figure 10) 10 ms
RPDD Receiver Powerdown Delay, (Figure 12) 1 µs
Chipset RSKM Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
(1)(2)
. See Application Information
section for more details on this parameter and how to apply it.
Symbol Parameter Min Typ Max Units
RSKM Receiver Skew Margin without Deskew f = 112 MHz 170 ps
in non-DC Balance Mode, (Figure 13)
(3)
f = 100 MHz 170 240 ps
f = 85MHz 300 350 ps
f = 66MHz 300 350 ps
RSKM Receiver Skew Margin without Deskew f = 112 MHz 170 ps
in DC Balance Mode, (Figure 13)
(3)
f = 100 MHz 170 200 ps
f = 85 MHz 250 300 ps
f = 66 MHz 250 300 ps
f = 50MHz 300 350 ps
RSKMD Receiver Skew Margin with Deskew in f = 33 to 80 MHz 0.25TBIT ps
DC Balance, (Figure 14)
(4)
RDR Receiver Deskew Range f = 80 MHz ±1 TBIT
RDSS Receiver Deskew Step Size f = 80 MHz 0.3TBIT ns
(1) The Minimum and Maximum Limits are based on statistical analysis of the device performance over voltage and temperature ranges.
This parameter is functionally tested on Automatic Test Equipment (ATE). ATE is limited to 85MHz. A sample of characterization parts
have been bench tested to verify functional performance.
(2) Typical values for RSKM and RSKMD are applicable for fixed V
CC
and T
A
for the Transmitter and Receiver (both are assumed to be at
the same V
CC
and T
A
points).
(3) Receiver Skew Margin (RSKM) is defined as the valid data sampling region at the receiver inputs. This margin takes into account
transmitter output pulse positions (min and max) and the receiver input setup and hold time (internal data sampling window - RSPOS).
This margin allows for LVDS interconnect skew, inter-symbol interference (both dependent on type/length of cable) and clock
jitter.RSKM ≥ cable skew (type, length) + source clock jitter (cycle to cycle, TJCC) + ISI (if any). See Applications Information section for
more details.
(4) Receiver Skew Margin with Deskew (RSKMD) is defined as the valid data sampling region at the receiver inputs. The DESKEW function
will constrain the receiver’s sampling strobes to the middle half of the LVDS bit and removes (adjusts for) fixed interconnect skew. This
margin (RSKMD) allows for inter-symbol interference (dependent on type/length of cable), Transmitter Pulse Position (TPPOS) variance,
and LVDS clock jitter (TJCC).RSKMD ≥ ISI + TPPOS(variance) + source clock jitter (cycle to cycle). See Applications Information
section for more details.
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