Datasheet
Table Of Contents
- Features
- Description
- Absolute Maximum Ratings
- Recommended Operating Conditions
- Electrical Characteristics
- Recommended Transmitter Input Characteristics
- Transmitter Switching Characteristics
- Receiver Switching Characteristics
- Chipset RSKM Characteristics
- AC Timing Diagrams
- Applications Information
- NEW FEATURES DESCRIPTION
- CLOCK JITTER
- RSKM - RECEIVER SKEW MARGIN
- RSKMD - RECEIVER SKEW MARGIN WITH DESKEW
- POWER DOWN
- CONFIGURATIONS
- CABLE TERMINATION
- HOW TO CONFIGURE FOR BACKPLANE APPLICATIONS
- HOW TO CONFIGURE FOR CABLE INTERCONNECT APPLICATIONS
- SUPPLY BYPASS RECOMMENDATIONS
- INPUT SIGNAL QUALITY REQUIREMENTS - TRANSMITTER
- UNUSED LVDS OUTPUTS
- RECEIVER OUTPUT DRIVE STRENGTH
- LVDS INTERCONNECT GUIDELINES
- Typical Data Rate vs Cable Length Curve
- Data Rate vs Cable Length Test Procedure
- Revision History
DS90CR483A, DS90CR484A
www.ti.com
SNLS291A –APRIL 2008–REVISED APRIL 2013
LVDS Interface
Figure 15. 48 Parallel TTL Data Bits Mapped to LVDS Outputs with DC Balance Enabled
Optional features supported: Pre-emphasis, and Deskew
Figure 16. 48 Parallel TTL Data Bits Mapped to LVDS Outputs with DC Balance Disabled
Optional feature supported: Pre-emphasis
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