Datasheet

DS90CR287, DS90CR288A
www.ti.com SNLS056G –OCTOBER 1999–REVISED MARCH 2013
Figure 14. DS90CR287 (Transmitter) Phase Lock Loop Set Time
Figure 15. DS90CR288A (Receiver) Phase Lock Loop Set Time
Figure 16. 28 Parallel TTL Data Inputs Mapped to LVDS Outputs
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