Datasheet

DS90CR287, DS90CR288A
www.ti.com SNLS056G –OCTOBER 1999–REVISED MARCH 2013
AC Timing Diagrams
Figure 6. “Worst Case” Test Pattern
Figure 7. DS90CR287 (Transmitter) LVDS Output Load and Transition Times
Figure 8. DS90CR288A (Receiver) CMOS/TTL Output Load and Transition Times
Figure 9. DS90CR287 (Transmitter) Input Clock Transition Time
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