Datasheet

DS90CR285, DS90CR286
www.ti.com SNLS130C –MARCH 1999–REVISED MARCH 2013
Figure 6. DS90CR285 (Transmitter) LVDS Output Load and Transition Times
Figure 7. DS90CR286 (Receiver) CMOS/TTL Output Load and Transition Times
Figure 8. DS90CR285 (Transmitter) Input Clock Transition Time
(1) Measurements at V
DIFF
= 0V
(2) TCCS measured between earliest and latest LVDS edges.
(3) TxCLK Differential Low→High Edge
Figure 9. DS90CR285 (Transmitter) Channel-to-Channel Skew
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