Datasheet

DS90CR217
www.ti.com SNLS226A –OCTOBER 2006–REVISED FEBRUARY 2013
AC Timing Diagrams
Figure 3. “Worst Case” Test Pattern
Figure 4. DS90CR217 (Transmitter) LVDS Output Load and Transition Times
Figure 5. D590CR217 (Transmitter) Input Clock Transition Time
Measurements at V
DIFF
= 0V
TCCS measured between earliest and latest LVDS edges
TxCLK Differential Low→High Edge
Figure 6. DS90CR217 (Transmitter) Channel-to-Channel Skew
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: DS90CR217