Datasheet

DS90CR215, DS90CR216
www.ti.com SNLS129D –MARCH 1999–REVISED APRIL 2013
APPLICATIONS INFORMATION
The DS90CR215 and DS90CR216 are backward compatible with the existing 5V Channel Link
transmitter/receiver pair (DS90CR213, DS90CR214). To upgrade from a 5V to a 3.3V system the following must
be addressed:
1. Change 5V power supply to 3.3V. Provide this supply to the V
CC
, LVDS V
CC
and PLL V
CC
.
2. Transmitter input and control inputs except 3.3V TTL/CMOS levels. They are not 5V tolerant.
3. The receiver powerdown feature when enabled wilI lock receiver output to a logic low. However, the 5V/66
MHz receiver maintain the outputs in the previous state when powerdown occurred.
DS90CR215 Pin Descriptions — Channel Link Transmitter
Pin Name I/O No. Description
TxIN I 21 TTL level input.
TxOUT+ O 3 Positive LVDS differential data output.
TxOUT− O 3 Negative LVDS differential data output.
TxCLK IN I 1 TTL level clock input. The rising edge acts as data strobe. Pin name TxCLK IN.
TxCLK OUT+ O 1 Positive LVDS differential clock output.
TxCLK OUT− O 1 Negative LVDS differential clock output.
PWR DWN I 1 TTL level input. Assertion (low input) TRI-STATEs the outputs, ensuring low current at power down.
V
CC
I 4 Power supply pins for TTL inputs.
GND I 5 Ground pins for TTL inputs.
PLL V
CC
I 1 Power supply pins for PLL.
PLL GND I 2 Ground pins for PLL.
LVDS V
CC
I 1 Power supply pin for LVDS outputs.
LVDS GND I 3 Ground pins for LVDS outputs.
DS90CR216 Pin Descriptions — Channel Link Receiver
Pin Name I/O No. Description
RxIN+ I 3 Positive LVDS differential data inputs.
RxIN− I 3 Negative LVDS differential data inputs.
RxOUT O 21 TTL level data outputs.
RxCLK IN+ I 1 Positive LVDS differential clock input.
RxCLK IN− I 1 Negative LVDS differential clock input.
RxCLK OUT O 1 TTL level clock output. The rising edge acts as data strobe. Pin name RxCLK OUT.
PWR DWN I 1 TTL level input. When asserted (low input) the receiver outputs are low.
V
CC
I 4 Power supply pins for TTL outputs.
GND I 5 Ground pins for TTL outputs.
PLL V
CC
I 1 Power supply for PLL.
PLL GND 1 2 Ground pin for PLL.
LVDS V
CC
I 1 Power supply pin for LVDS inputs.
LVDS GND I 3 Ground pins for LVDS inputs.
The Channel Link devices are intended to be used in a wide variety of data transmission applications. Depending
upon the application the interconnecting media may vary. For example, for lower data rate (clock rate) and
shorter cable lengths (< 2m), the media electrical performance is less critical. For higher speed/long distance
applications the media's performance becomes more critical. Certain cable constructions provide tighter skew
(matched electrical length between the conductors and pairs). Twin-coax for example, has been demonstrated at
distances as great as 5 meters and with the maximum data transfer of 1.38 Gbit/s. Additional applications
information can be found in the following Interface Application Notes:
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Product Folder Links: DS90CR215 DS90CR216